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公开(公告)号：US20180366642A1
公开(公告)日：2018-12-20
申请号：US16112173
申请日：2018-08-24
Applicant: Avalanche Technology, Inc.
Inventor： Hongxin Yang , Dong Ha Jung , Jing Zhang , Bing K. Yen
CPC classification number: H01L43/12 , G11C11/161 , H01L27/224 , H01L43/08
Abstract: The present invention is directed to a method for manufacturing a memory cell that includes a magnetic memory element electrically connected to a two-terminal selector. The method includes the steps of depositing a selector film stack on a substrate; depositing a magnetic memory element film stack on top of the selector film stack; etching the magnetic memory element film stack with an etch mask formed thereon to remove at least an insulating tunnel junction layer in the magnetic memory element film stack not covered by the etch mask, thereby forming a magnetic memory element pillar; depositing a first conforming dielectric layer over the magnetic memory element pillar, including a sidewall thereof, and surrounding surface; etching a portion of the first conforming dielectric layer covering the surrounding surface to form a first protective sleeve around at least the insulating tunnel junction layer of the magnetic memory element pillar; and etching the selector film stack using the etch mask and the first protective sleeve as a composite mask to form a memory cell pillar.
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公开(公告)号：US20180075891A1
公开(公告)日：2018-03-15
申请号：US15264847
申请日：2016-09-14
Applicant: Avalanche Technology, Inc.
Inventor： Hongxin Yang , Xiaobin Wang , Jing Zhang , Xiaojie Hao , Zihui Wang , Kimihiro Satoh
CPC classification number: G11C11/1673 , G11C11/161 , G11C11/1659 , H01L27/224 , H01L27/2463 , H01L43/02 , H01L43/12
Abstract: The present invention is directed to a method for sensing the resistance state of a memory cell that includes an MTJ memory element coupled to a two-terminal selector element in series. The method includes the steps of raising a cell voltage across the memory cell above a threshold voltage for the selector element to become conductive; decreasing the cell voltage to a first sensing voltage and measuring a first sensing current passing through the memory cell, the selector element being nominally conductive irrespective of the resistance state of the MTJ memory element at the first sensing voltage; and further decreasing the cell voltage to a second sensing voltage and measuring a second sensing current, the selector element being nominally conductive if the MTJ memory element is in the low resistance state or nominally insulative if the MTJ memory element is in the high resistance state at the second sensing voltage.
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公开(公告)号：US11538857B2
公开(公告)日：2022-12-27
申请号：US16836922
申请日：2020-04-01
Applicant: Avalanche Technology, Inc.
Inventor： Zhiqiang Wei , Hongxin Yang
Abstract: The present invention is directed to a magnetic memory cell including a magnetic tunnel junction (MTJ) memory element and a two-terminal bidirectional selector coupled in series between two conductive lines. The MTJ memory element includes a magnetic free layer, a magnetic reference layer, and an insulating tunnel junction layer interposed therebetween. The two-terminal bidirectional selector includes bottom and top electrodes, first and third volatile switching layers interposed between the bottom and top electrodes, and a second volatile switching layer interposed between the first and third volatile switching layers. The bottom and top electrodes each independently include one of titanium nitride or iridium. The first and third volatile switching layers each include tantalum oxide and silver. The second volatile switching layer includes hafnium oxide and has a higher electrical resistance than the first and third volatile switching layers.
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公开(公告)号：US11127787B2
公开(公告)日：2021-09-21
申请号：US16793349
申请日：2020-02-18
Applicant: Avalanche Technology, Inc.
Inventor： Hongxin Yang , Bing K. Yen , Jing Zhang
Abstract: The present invention is directed to a memory cell that includes a magnetic tunnel junction (MTJ) memory element and a two-terminal selector element coupled in series. The MTJ memory element includes a magnetic free layer structure and a magnetic reference layer structure with an insulating tunnel junction layer interposed therebetween. The magnetic reference layer structure includes one or more magnetic reference layers having a first invariable magnetization direction substantially perpendicular to layer planes thereof. The two-terminal selector element includes a first inert electrode and a second inert electrode with a volatile switching layer interposed therebetween; a first active electrode formed adjacent to the first inert electrode; and a second active electrode formed adjacent to the second inert electrode. The volatile switching layer includes at least one conductor layer interleaved with insulating layers.
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公开(公告)号：US10559624B2
公开(公告)日：2020-02-11
申请号：US15438631
申请日：2017-02-21
Applicant: Avalanche Technology, Inc.
Inventor： Hongxin Yang , Xiaojie Hao , Jing Zhang , Xiaobin Wang , Bing K. Yen
Abstract: The present invention is directed to a memory cell that includes a magnetic tunnel junction (MTJ) memory element, which has a low resistance state and a high resistance state, and a two-terminal selector coupled to the MTJ memory element in series. The MTJ memory element includes a magnetic free layer and a magnetic reference layer with an insulating tunnel junction layer interposed therebetween. The two-terminal selector has an insulative state and a conductive state. The two-terminal selector in the conductive state has substantially lower resistance when switching the MTJ memory element from the low to high resistance state than from the high to low resistance state. The voltages applied to the memory cell to respectively switch the MTJ memory element from the low to high resistance state and from the high to low resistance state may be substantially same.
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Patent Agency Ranking
公开(公告)号：US10522590B2
公开(公告)日：2019-12-31
申请号：US15921552
申请日：2018-03-14
Applicant: Avalanche Technology, Inc.
Inventor： Kimihiro Satoh , Hongxin Yang
Abstract: The present invention is directed to a memory device including a magnetic memory element; a horizontal conductive line disposed above the magnetic memory element; a bottom electrode formed beneath the magnetic memory element and having a top, first and second sides that are opposite to each other; a first vertical conductive line formed adjacent to the first side of the bottom electrode with a first volatile switching layer and a first electrode layer interposed therebetween; and a second vertical conductive line formed adjacent to the second side of the bottom electrode with a second volatile switching layer and a second electrode layer interposed therebetween. The magnetic memory element is electrically connected to the horizontal conductive line at one end and to the bottom electrode at the other end.
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公开(公告)号：US20180240845A1
公开(公告)日：2018-08-23
申请号：US15863825
申请日：2018-01-05
Applicant: Avalanche Technology, Inc.
Inventor： Hongxin Yang , Bing K. Yen , Jing Zhang
CPC classification number: H01L27/224 , G11C11/161 , G11C11/1659 , G11C11/1673 , G11C11/1675 , G11C16/10 , H01L43/08 , H01L43/10 , H01L45/085
Abstract: The present invention is directed to a memory cell that includes a magnetic tunnel junction (MTJ) memory element and a two-terminal selector element coupled in series. The MTJ memory element includes a magnetic free layer structure and a magnetic reference layer structure with an insulating tunnel junction layer interposed therebetween. The magnetic reference layer structure includes one or more magnetic reference layers having a first invariable magnetization direction substantially perpendicular to layer planes thereof. The two-terminal selector element includes a first inert electrode and a second inert electrode with a volatile switching layer interposed therebetween; a first active electrode formed adjacent to the first inert electrode; and a second active electrode formed adjacent to the second inert electrode. The volatile switching layer includes a plurality of metal-rich particles or clusters embedded in a matrix or at least one conductor layer interleaved with insulating layers.
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公开(公告)号：US10593727B2
公开(公告)日：2020-03-17
申请号：US15863825
申请日：2018-01-05
Applicant: Avalanche Technology, Inc.
Inventor： Hongxin Yang , Bing K. Yen , Jing Zhang
Abstract: The present invention is directed to a memory cell that includes a magnetic tunnel junction (MTJ) memory element and a two-terminal selector element coupled in series. The MTJ memory element includes a magnetic free layer structure and a magnetic reference layer structure with an insulating tunnel junction layer interposed therebetween. The magnetic reference layer structure includes one or more magnetic reference layers having a first invariable magnetization direction substantially perpendicular to layer planes thereof. The two-terminal selector element includes a first inert electrode and a second inert electrode with a volatile switching layer interposed therebetween; a first active electrode formed adjacent to the first inert electrode; and a second active electrode formed adjacent to the second inert electrode. The volatile switching layer includes a plurality of metal-rich particles or clusters embedded in a matrix or at least one conductor layer interleaved with insulating layers.
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公开(公告)号：US20200006422A1
公开(公告)日：2020-01-02
申请号：US16024601
申请日：2018-06-29
Applicant: Avalanche Technology, Inc.
Inventor： Hongxin Yang , Bing K. Yen
Abstract: The present invention is directed to a memory cell array comprising an array of magnetic memory elements arranged in rows and columns; a plurality of electrodes, each of which is formed adjacent to a respective one of the array of magnetic memory elements; a plurality of first conductive lines, each of which is connected to a respective row of the array of magnetic memory elements along a row direction; and a plurality of composite lines. Each composite line includes a volatile switching layer connected to a respective column of the plurality of electrodes along a column direction; an electrode layer formed adjacent to the volatile switching layer; and a second conductive line formed adjacent to the electrode layer. The dimension of the volatile switching layer may be substantially larger than the size of the magnetic memory element along the row direction.
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公开(公告)号：US20190288031A1
公开(公告)日：2019-09-19
申请号：US15921552
申请日：2018-03-14
Applicant: Avalanche Technology, Inc.
Inventor： Kimihiro Satoh , Hongxin Yang
Abstract: The present invention is directed to a memory device including a magnetic memory element; a horizontal conductive line disposed above the magnetic memory element; a bottom electrode formed beneath the magnetic memory element and having a top, first and second sides that are opposite to each other; a first vertical conductive line formed adjacent to the first side of the bottom electrode with a first volatile switching layer and a first electrode layer interposed therebetween; and a second vertical conductive line formed adjacent to the second side of the bottom electrode with a second volatile switching layer and a second electrode layer interposed therebetween. The magnetic memory element is electrically connected to the horizontal conductive line at one end and to the bottom electrode at the other end.
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