摘要:
Described herein are implantable medical devices useful in treating vascular conditions such as restenosis. In one embodiment, stents are described in which a combination of bioactive agents is described for local delivery in the vasculature. The combination of bioactive agents comprises at least one compound capable of inhibiting smooth muscle cell proliferation and at least one compound capable of mitigating MCP- and/or TF induction. For example, a compound capable of inhibiting smooth muscle cell proliferation is a mTOR inhibitor and a compound capable of mitigating MCP-1 and/or TF induction is a corticosteroid.
摘要:
Implantable medical devices having anti-restenotic coatings are disclosed. Specifically, implantable medical devices having coatings of certain NF-kappaB inhibitors, particularly certain dialkyl fumarates, are disclosed. Dimethyl fumarate is a particularly preferred dialkyl fumarate. The anti-restenotic medical devices include stents, catheters, micro-particles, probes and vascular grafts. Intravascular stents are preferred medical devices. The medical devices can be coated using any method known in the art including compounding the dialkyl fumarate with a biocompatible polymer prior to applying the coating. Moreover, medical devices composed entirely of biocompatible polymer-dialkyl fumarate blends are disclosed. Additionally, medical devices having a coating comprising at least one dialkyl fumarate in combination with at least one additional therapeutic agent are also disclosed. Furthermore, related methods of using and making the anti-restenotic implantable devices are also disclosed.
摘要:
Described herein are methods and medical devices used to deliver bioactive agents locally to patients in need of treatment and/or prevention of cardiovascular conditions Local delivery of protease-activated receptor 1 (PAR-1) antagonists are described herein from implantable medical devices including, but not limited to, stents.
摘要:
A digital signal processing circuit having a pre-adder circuit includes; a first register block and a pre-adder circuit coupled to a multiplier circuit and to a set of multiplexers, where the set of multiplexers are controlled by an opcode, and where the pre-adder circuit has a first adder circuit; and an arithmetic logic unit (ALU) having a second adder circuit and coupled to the set of multiplexers.
摘要:
The invention is directed to novel compositions of matter and methods of detecting in situ an immunohistochemical epitope or nucleic acid sequence of interest in a biological sample comprising binding an enzyme-labeled conjugate molecule to the epitope or sequence of interest in the presence of a redox-inactive reductive species and a soluble metal ion, thereby facilitating the reduction of the metal ion to a metal atom at or about the point where the enzyme is anchored. Novel phosphate derivatives of reducing agents are described that when exposed to a phosphatase are activated to their reducing form, thereby reducing metal ions to insoluble metal.
摘要:
A system for programming configuration memory cells in an integrated circuit. The system includes: a set of data registers, wherein a member of the set has a temporary storage for a fixed number of configuration bits; and a plurality of rows, each row has a plurality of columns, wherein configuration memory cells in a selected column and in a selected row are programmed using the fixed number of configuration bits.
摘要:
A memory includes a plurality of row segments, with each row segment having a number of memory cells coupled to a corresponding dataline segment pair. Dataline driver circuits are provided between row segments to buffer signals on adjacent dataline segments. A control circuit is coupled to at least one row segment, and provides control signals to the at least one row segment and to the dataline driver circuits.
摘要:
A physical floorplan for a digital signal processing (DSP) block including; an interconnect column having a plurality of programmable interconnect elements; a first DSP element having a plurality of first columns, a first output register column of the plurality of first columns positioned adjacent to the interconnect column; and a second DSP element, having a plurality of second columns a second output register column of the plurality of second columns positioned adjacent to the interconnect column.
摘要:
A digital signal processing circuit including: a multiplier circuit; a plurality of. multiplexers coupled to the multiplier circuit and controlled by a first opcode; and an arithmetic logic unit coupled to plurality of multiplexers and controlled by a second opcode.
摘要:
It is sometimes desirable to protect a design used in a PLD from being copied. If the design is stored in a different device from the PLD and read into the PLD through a bitstream, the design may be encrypted as it is read into the PLD and decrypted within the PLD before being loaded into configuration memory cells for configuring the PLD. According to the invention, in such a device, a method is provided to prevent the design from being read back from the PLD in its decrypted state if it had been encrypted when loaded into the PLD.