METHOD FOR PREPARING ARRAY SUBSTRATE, ARRAY SUBSTRATE AND DISPLAY PANEL

    公开(公告)号:US20210111200A1

    公开(公告)日:2021-04-15

    申请号:US16846888

    申请日:2020-04-13

    摘要: The present disclosure discloses a method for preparing an array substrate, an array substrate and a display panel, wherein the method comprises: forming a buffer layer on a substrate in a first region and a second region, wherein the buffer layer has a groove located in the second region; forming a first indium oxide thin film on the buffer layer in the first region; forming a second indium oxide thin film in the groove; performing a reduction process on the second indium oxide thin film to obtain indium particles; forming an amorphous silicon thin film in the groove, and inducing the amorphous silicon of the amorphous silicon thin film to form microcrystalline silicon at a preset temperature by using the indium particles; and removing the indium particles in the microcrystalline silicon to form a microcrystalline silicon semiconductor layer of the microcrystalline silicon thin film transistor.

    ARRAY SUBSTRATE AND DISPLAY PANEL
    2.
    发明公开

    公开(公告)号:US20230352496A1

    公开(公告)日:2023-11-02

    申请号:US18208529

    申请日:2023-06-12

    IPC分类号: H01L27/12

    CPC分类号: H01L27/127 H01L27/1233

    摘要: Disclosed are an array substrate and a display panel. The array substrate includes: a base substrate; a first thin film transistor on the base substrate; where the first thin film transistor includes: a first gate electrode, a first active layer, a first source electrode, and a first drain electrode; where the first active layer includes: at least one guide structure extending in a first direction; a silicon-based nanowire, disposed on a side of the guide structure facing away from the base substrate; and an extending direction of the silicon-based nanowire is same as an extending direction of the guide structure.

    ARRAY SUBSTRATE, PREPARATION METHOD THEREOF, AND DISPLAY PANEL

    公开(公告)号:US20230154939A1

    公开(公告)日:2023-05-18

    申请号:US17047912

    申请日:2020-03-25

    IPC分类号: H01L27/12

    CPC分类号: H01L27/127 H01L27/1233

    摘要: This disclosure provides an array substrate, a method for preparing the array substrate, and a display panel. The method includes: forming a first thin film transistor and a second thin film transistor on a base substrate. In the formation of an active layer of the first thin film transistor, by using an eutectic point of the catalyst particle and silicon, and a driving factor that the Gibbs free energy of amorphous silicon is greater than that of crystalline silicon (silicon-based nanowire), and due to absorption of the amorphous silicon by the molten catalyst particle to form a supersaturated silicon eutectoid, the silicon nucleates and grows into a silicon-based nanowire. Moreover, during the growth of the silicon-based nanowire, the amorphous silicon film grows linearly along guide structure under the action of the catalyst particle, thus obtaining a silicon-based nanowire with a high density and high uniformity. In addition, by controlling the size of the catalyst particle and the thickness of the amorphous silicon film, the width of the silicon-based nanowire may also be controlled. In this way, a thin film transistor having a silicon-based nanowire with a uniform and controllable size is prepared.

    THIN FILM TRANSISTOR, PIXEL STRUCTURE, DISPLAY DEVICE AND MANUFACTURING METHOD

    公开(公告)号:US20210028315A1

    公开(公告)日:2021-01-28

    申请号:US16641078

    申请日:2019-02-22

    摘要: The present disclosure provides a thin film transistor, a pixel structure, a display device, and a manufacturing method. The thin film transistor includes: a gate on the substrate; a gate insulating layer covering the gate and the substrate; a first support portion and a second support portion, which are provided on the gate insulating layer covering the substrate and located on both sides of the gate, wherein the first support portion is not connected to the second support portion; a semiconductor layer on the first support portion, the second support portion, and the gate insulating layer covering the gate; and a source and a drain respectively connected to the semiconductor layer. The first support portion and the second support portion are respectively configured to support the semiconductor layer.

    THIN FILM TRANSISTOR AND METHOD FOR MANUFACTURING THE SAME, DISPLAY DEVICE

    公开(公告)号:US20220320449A1

    公开(公告)日:2022-10-06

    申请号:US17427556

    申请日:2020-12-29

    IPC分类号: H01L51/05

    摘要: A thin film transistor, a method for manufacturing the same and a display device are disclosed, the thin film transistor includes: a first electrode, a second electrode, an active layer and a flexible conductive layer located on a substrate, one of the first electrode and the second electrode is a source, and the other thereof is a drain; the active layer is electrically coupled with the first electrode, and an orthographic projection of the active layer on the substrate is within an orthographic projection of the first electrode on the substrate; the flexible conductive layer is located on a side of the active layer away from the first electrode, and electrically couples the active layer with the second electrode.

    PHOTOELECTRIC DETECTOR, PREPARATION METHOD THEREOF, DISPLAY PANEL AND DISPLAY DEVICE

    公开(公告)号:US20210005769A1

    公开(公告)日:2021-01-07

    申请号:US16909526

    申请日:2020-06-23

    摘要: The present disclosure discloses a photoelectric detector, a preparation method thereof, a display panel and a display device. The photoelectric detector includes a base, and a thin film transistor (TFT) and a photosensitive PIN device on the base, wherein the PIN device includes an I-type region that does not overlap with an orthographic projection of the TFT on the base; a first etching barrier layer covering a top surface of the I-type region; a first heavily doped region in contact with a side surface on a side, proximate to the TFT, of the I-type region; and a second heavily doped region in contact with a side surface on a side, away from the TFT, of the I-type region, the doping types of the first heavily doped region and the second heavily doped region being different from each other.