Fin Structures with Damage-Free Sidewalls for Multi-Gate Mosfets
    1.
    发明申请
    Fin Structures with Damage-Free Sidewalls for Multi-Gate Mosfets 审中-公开
    具有无门侧壁的翅片结构,用于多栅极Mosfets

    公开(公告)号:US20130196488A1

    公开(公告)日:2013-08-01

    申请号:US13605085

    申请日:2012-09-06

    IPC分类号: H01L21/20

    摘要: Improved Fin Field Effect Transistors (FinFET) are provided, as well as improved techniques for forming fins for a FinFET. A fin for a FinFET is formed by forming a semi-insulating layer on an insulator that gives a sufficiently large conduction band offset (ΔEc) ranging from 0.05-0.6 eV; patterning an epitaxy mask on the semi-insulating layer, wherein the epitaxy mask has a reverse image of a desired pattern of the fin; performing a selective epitaxial growth within the epitaxy mask; and removing the epitaxy mask such that the fin remains on the semi-insulating layer. The semi-insulating layer comprises, for example, a III-V semiconductor material and optionally further comprises a Si δ-doping layer to supply electron carriers to the III-V channel.

    摘要翻译: 提供了改进的鳍场效应晶体管(FinFET),以及用于形成FinFET鳍片的改进技术。 通过在绝缘体上形成半绝缘层,形成范围从0.05-0.6eV的足够大的导带偏移(DeltaEc)形成FinFET鳍; 在所述半绝缘层上构图外延掩模,其中所述外延掩模具有鳍的期望图案的反向图像; 在外延掩模内进行选择性外延生长; 并移除外延掩模,使得翅片保留在半绝缘层上。 半绝缘层包括例如III-V族半导体材料,并且任选地还包括用于向III-V沟道提供电子载流子的Si-δ掺杂层。

    Fin Structures with Damage-Free Sidewalls for Multi-Gate Mosfets
    2.
    发明申请
    Fin Structures with Damage-Free Sidewalls for Multi-Gate Mosfets 审中-公开
    具有无门侧壁的翅片结构,用于多栅极Mosfets

    公开(公告)号:US20130193482A1

    公开(公告)日:2013-08-01

    申请号:US13359849

    申请日:2012-01-27

    IPC分类号: H01L29/78 H01L21/20

    摘要: Improved Fin Field Effect Transistors (FinFET) are provided, as well as improved techniques for forming fins for a FinFET. A fin for a FinFET is formed by forming a semi-insulating layer on an insulator that gives a sufficiently large conduction band offset (ΔEe) ranging from 0.05-0.6 eV; patterning an epitaxy mask on the semi-insulating layer, wherein the epitaxy mask has a reverse image of a desired pattern of the fin; performing a selective epitaxial growth within the epitaxy mask; and removing the epitaxy mask such that the fin remains on the semi-insulating layer. The semi-insulating layer comprises, for example, a III-V semiconductor material and optionally further comprises a Si δ-doping layer to supply electron carriers to the III-V channel.

    摘要翻译: 提供了改进的鳍场效应晶体管(FinFET),以及用于形成FinFET鳍片的改进技术。 通过在绝缘体上形成半导体带偏移(DeltaEe)为0.05-0.6eV的半绝缘层,形成FinFET的鳍; 在所述半绝缘层上构图外延掩模,其中所述外延掩模具有鳍的期望图案的反向图像; 在外延掩模内进行选择性外延生长; 并移除外延掩模,使得翅片保留在半绝缘层上。 半绝缘层包括例如III-V族半导体材料,并且任选地还包括用于向III-V沟道提供电子载流子的Si-δ掺杂层。

    Semiconductor Substrates Using Bandgap Material Between III-V Channel Material and Insulator Layer
    3.
    发明申请
    Semiconductor Substrates Using Bandgap Material Between III-V Channel Material and Insulator Layer 有权
    在III-V通道材料和绝缘层之间使用带隙材料的半导体衬底

    公开(公告)号:US20130193441A1

    公开(公告)日:2013-08-01

    申请号:US13361004

    申请日:2012-01-30

    IPC分类号: H01L29/20 H01L21/20

    摘要: Improved semiconductor substrates are provided that employ a wide bandgap material between the channel and the insulator. A semiconductor substrate comprises a channel layer comprised of a III-V material; an insulator layer; and a wide bandgap material between the channel layer and the insulator layer, wherein a conduction band offset (ΔEc) between the channel layer and the wide bandgap material is between 0.05 eV and 0.8 eV. The channel layer can be comprised of, for example, In1-xGaxAs or In1-xGaxSb, with x varying from 0 to 1. The wide bandgap material can be comprised of, for example, In1-yAlyAs, In1-yAlyP, Al1-yGayAs or In1-yGayP, with y varying from 0 to 1.

    摘要翻译: 提供了改进的半导体衬底,其在通道和绝缘体之间采用宽带隙材料。 半导体衬底包括由III-V材料构成的沟道层; 绝缘体层; 以及在沟道层和绝缘体层之间的宽带隙材料,其中沟道层和宽带隙材料之间的导带偏移(DeltaEc)在0.05eV和0.8eV之间。 沟道层可以由例如In1-xGaxAs或In1-xGaxSb组成,x的变化范围为0到1.宽带隙材料可以由例如In1-yAlyAs,In1-yAlyP,Al1-yGayAs 或In1-yGayP,y从0变化到1。