Abstract:
A system, method and article of manufacture are provided for facilitating user interface roaming in an interface roaming network framework. Received from a wireless link is a list of usable interface clients in proximity to the wireless link. Each usable interface client has functional capabilities associated with it. One of the interface clients is selected from the list and the wireless link is notified of the selected interface client. A connection is then initiated with the selected interface client and an application is executed based on the capabilities of the selected interface client in order to generate content. The generated content is then transmitted to the interface client so that the content may be displayed using the interface client.
Abstract:
A frequency synthesizer with a digital frequency lock loop (FLL) having a fast frequency lock time uses a frequency counter circuit in the feedback loop to count the output signal frequency and produce frequency count data. A modulation control circuit provides modulation data and a corresponding modulation control signal for modulating the FLL signal source. A microprocessor processes the frequency count data along with the modulation data to provide a frequency control signal for controlling the nominal, or center, frequency of the FLL signal source. By processing these data together, thereby accounting for the amount of modulation applied to the FLL signal source, the center frequency can be maintained more consistently notwithstanding the presence of modulation within the feedback loop signal.
Abstract:
A phase-lock loop (PLL) includes a switch for opening the loop (e.g. for direct modulation of its voltage-controlled oscillator (VCO) during transmission of an intermittent signal such as data bursts) and has a phase comparator which can be selectively initialized (e.g. by setting to a programmed value or resetting to zero or terminal count value the reference and/or feedback signal frequency dividers) so that upon "re-closing" of the loop the PLL will achieve phase-lock within a predetermined amount of time. When the loop is opened, the VCO's dc ("phase-lock") control voltage can be maintained so as to help ensure that phase-lock will be achieved within the desired amount of time.
Abstract:
A test solution for one or more circuits implementing a communication standard is based on a design specification received from a development organization and a communication standard. The test solution is evaluated with one or more prototype circuits and is selectively modified based on the evaluation with the prototype circuits. The test solution is then evaluated with one or more manufactured circuits and is selectively modified based on the evaluation with the manufactured circuits.
Abstract:
A radio frequency (RF) transceiver for providing substantially coincident communication of RF and related baseband control signals. Baseband circuitry within the transmitter and receiver sections provides for storage of related control data which can be used in real time to control processing of the transmitted or received data, respectively.
Abstract:
A bed plate (13) for a fluidized bed apparatus is made from a plate (23) from sheet metal and comprises openings (22) for fluidizing air or gas of the so-called "gill-type". In order to reduce or prevent fall-through of product, at least one of the edge portions (24,34) defining the opening (22) has been deformed so as to increase the extension thereof along the plane of the bed plate, and so as to thereby reduce or eliminate the orthographic projection on said plane of the opening (22). Such deformation may comprise compression and/or stretching. The edge portion or portions (24,34) are preferably deformed to such an extent that a partial overlap is obtained.
Abstract:
A test solution for one or more circuits implementing a communication standard is based on a design specification received from a development organization and a communication standard. The test solution is evaluated with one or more prototype circuits and is selectively modified based on the evaluation with the prototype circuits. The test solution is then evaluated with one or more manufactured circuits and is selectively modified based on the evaluation with the manufactured circuits.
Abstract:
A radio frequency (RF) transceiver for modulating and demodulating RF signals with a direct modulation transmitter and a dual intermediate frequency (IF) receiver, respectively, includes a local oscillator, three frequency converters, a demodulator, a carrier generator, a modulator, a controller and two signal switches. The local oscillator (e.g. phase lock loop PLL!) provides a first local oscillator (LO) signal. One frequency converter (e.g. mixer) frequency converts an incoming modulated RF signal with the first LO signal to provide a first modulated IF signal. A second frequency converter frequency converts the first modulated IF signal with a second LO signal to provide a second modulated IF signal. The demodulator also receives the second LO signal and demodulates therewith the second modulated IF signal. The carrier generator (e.g. voltage-controlled oscillator VCO!) receives a transmitter control signal and in accordance therewith generates a transmitter carrier signal. The third frequency converter receives the transmitter carrier signal and the first LO signal and in response thereto provides the second LO signal. The modulator selectively receives and modulates the second LO signal to provide a third modulated IF signal. The controller (e.g. phase detector) receives a reference signal and selectively receives the second LO signal and the third modulated IF signal and in response thereto provides the transmitter control signal. The signal switches receive a mode control signal and in response to one state thereof connect the controller to the third frequency converter and in response to another state thereof connect the modulator to both the third frequency converter and controller.
Abstract:
A radio frequency (RF) transceiver includes a direct modulation transmitter and single down-conversion receiver for operation in a time-division-duplex (TDD) telecommunications environment. A single RF signal source, in the form of a phase-lock-loop (PLL), is used on a time-shared basis to provide both the carrier signal for the transmitter and the local oscillator (LO) signal for the receiver. In the transmitter, direct modulation is effected by modulating a voltage-controlled oscillator (VCO) in the PLL with a burst of the transmit data while opening the loop and holding the loop feedback tuning voltage constant. In the receiver, a self-adjusting comparator threshold is provided for automatically setting and adjusting a demodulated signal comparison threshold used in retrieving the data and data clock from the demodulated receive signal. The interface between the transmitter and receiver and the host controller provides the control signals needed for the time-sharing of the single RF signal source, the proper programming of the PLL for the different transmitter carrier and receiver LO frequencies, the PLL loop control for the direct modulation of the VCO, and the enablement, or powering down, of the transmitter and receiver sections to minimize transceiver power consumption.
Abstract:
A system and method of providing driver software to a test controller to facilitate testing by a wireless transceiver tester of a device under test (DUT). Using the wireless transceiver tester, executable tester instructions are accessed from one or more computer readable media and in accordance therewith bi-directional signal communications are established between the wireless transceiver tester and the test controller, and between the wireless transceiver tester and the DUT. Further accessed are executable driver instructions, including a plurality of executable driver program instructions for driving at least one of the wireless transceiver tester and the DUT, which are communicated to the test controller.