-
公开(公告)号：US5524339A
公开(公告)日：1996-06-11
申请号：US308886
申请日：1994-09-19
CPC分类号： H01L23/562 , H01L23/29 , H01L23/315 , H01L23/5385 , H01L23/5389 , H01L23/66 , H01L24/24 , H01L24/82 , H01L2224/24227 , H01L2224/82039 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01074 , H01L2924/01082 , H01L2924/10329 , H01L2924/12042 , H01L2924/14 , H01L2924/1423 , H01L2924/15153 , H01L2924/15165 , H01L2924/15787 , H01L2924/3011 , H01L2924/3025 , Y10T29/49144 , Y10T29/49146
摘要： In a method for preserving an air bridge structure on an integrated circuit chip, a protective layer is plasma-deposited over the top and sides of the air bridge. A high density interconnect structure is applied over the chip and protective layer. The protective film provides mechanical strength during the application of the high density interconnect structure to prevent deformation. It also prevents any contamination from intruding under the air bridge. More importantly, the protective film only negligibly impedes the performance of the air bridge and therefore does not need to be removed, thereby eliminating the necessity of ablating the HDI structure.
摘要翻译： 在一种用于在集成电路芯片上保持空气桥结构的方法中，保护层被等离子体沉积在空气桥的顶部和侧面上。 在芯片和保护层上施加高密度互连结构。 保护膜在应用高密度互连结构期间提供机械强度以防止变形。 它还可以防止任何污染物侵入空气桥下。 更重要的是，保护膜只能忽略不计地阻碍空气桥的性能，因此不需要去除，从而消除了消除HDI结构的必要性。
-
2.发明授权Method and fixturing to perform two side laminations of stacked substrates forming 3-D modules 失效方法和固定以执行形成3-D模块的堆叠衬底的两侧叠层
公开(公告)号：US5950303A
公开(公告)日：1999-09-14
申请号：US056043
申请日：1998-04-03
CPC分类号： B29C63/0026 , H05K3/403 , B29L2009/00 , H05K1/0306 , H05K1/144 , H05K2201/09581 , H05K2203/0165 , H05K2203/068 , H05K3/4611 , H05K3/4629 , H05K3/4685 , Y10T29/49126 , Y10T29/5317
摘要： A substrate stack is suspended within a stack holder to position upper and lower stack surfaces coplanar with upper and lower holder surfaces. Laminating heat and pressure is simultaneously applied to the upper and lower surfaces to laminate a carrier interconnect film to top and bottom stack portions simultaneously. Subsequent wet chemical processing of both stack edges may also be simultaneous to effect savings in manufacturing costs.
摘要翻译： 衬底堆叠悬挂在堆叠保持器内以将上和下堆叠表面定位成与上保持器表面和下保持器表面共面。 叠层热和压力同时施加到上表面和下表面，以将载体互连膜同时层叠到顶部和底部堆叠部分。 随后的两个堆叠边缘的湿化学处理也可以同时实现制造成本的节省。
-
3.发明授权
公开(公告)号：US5472539A
公开(公告)日：1995-12-05
申请号：US254725
申请日：1994-06-06
CPC分类号： H01H50/005 , H02K99/00 , H01H2050/007
摘要： A low temperature batch method for forming and positioning permanent magnets on electromagnetically actuated micro-fabricated components, such as electrical switches employs a first adhesive, such as a Siltem/epoxy blend of an epoxy resin and a siloxane polyimide polymer, to releasably attach a mold layer of Kapton polyimide to a substrate, which may be the movable portion of a micromechanical structure, or a precursor to such movable portion. A well-shape cavity is formed in the mold layer, and filled with a slurry of rare earth NdFeB magnetic particles suspended in a second adhesive, which is cured to form the body of a magnet. The second adhesive is an SPI/epoxy blend, also of an epoxy resin and a siloxane polyimide polymer, but with a greater adhesion strength and a higher temperature softening point compared to the Siltem/epoxy blend. The entire structure is heated, and the mold layer is pulled off the substrate, while the body of magnetic material remains firmly attached. Selective etchants may be subsequently employed to remove metal sacrificial layers, while the NdFeB magnetic particles are protected from attack by the etchant by being effectively encased in plastic.
摘要翻译： 用于在诸如电气开关的电磁致动微制造部件上形成和定位永磁体的低温分批方法采用第一粘合剂，例如环氧树脂的Siltem /环氧共混物和硅氧烷聚酰亚胺聚合物，以可释放地附接模具 Kapton聚酰亚胺层可以是基底，其可以是微机械结构的可移动部分，或者是可移动部分的前体。 在模具层中形成良好的形状的空腔，并填充悬浮在第二粘合剂中的稀土NdFeB磁性颗粒的浆料，其被固化以形成磁体的主体。 第二种粘合剂是SPI /环氧共混物，也是环氧树脂和硅氧烷聚酰亚胺聚合物，但是与Siltem /环氧树脂共混物相比具有更大的粘合强度和更高的温度软化点。 整个结构被加热，并且模具层被拉离基板，而磁性材料的主体保持牢固地附着。 随后可以选择性蚀刻剂去除金属牺牲层，同时通过被有效地包裹在塑料中来保护NdFeB磁性颗粒免受蚀刻剂的侵蚀。
-
公开(公告)号：US07158383B2
公开(公告)日：2007-01-02
申请号：US10716143
申请日：2003-11-18
IPC分类号： H05K1/16
CPC分类号： H01C17/12 , B29C59/14 , H01C7/006 , H05K1/0346 , H05K1/167 , H05K3/381 , H05K3/388 , H05K2201/0154 , H05K2201/0317 , H05K2203/095 , H05K2203/1136
摘要： A technique for fabricating a resistor on a flexible substrate. Specifically, at least a portion of a polyimide substrate is activated by exposure to a ion sputter etch techniques. A metal layer is disposed over the activated portion of the substrate, thereby resulting in the formation of a highly resistive metal-carbide region. Interconnect layers are disposed over the metal-carbide region and patterned to form terminals at opposite ends of the metal carbide region. The metal-carbide region is patterned to form a resistor between the terminals. Alternatively, only a selected area of the polyimide substrate is activated. The selected area forms the area in which the metal-carbide region is formed. Interconnect layers are disposed over the metal-carbide region and patterned to form terminals at opposite ends of the metal-carbide region.
摘要翻译： 一种在柔性基板上制造电阻器的技术。 具体地，通过暴露于离子溅射蚀刻技术来活化聚酰亚胺基底的至少一部分。 金属层设置在基板的激活部分上，从而形成高电阻金属碳化物区域。 互连层设置在金属碳化物区域上并被图案化以在金属碳化物区域的相对端形成端子。 将金属碳化物区域图案化以在端子之间形成电阻器。 或者，仅激活聚酰亚胺基板的选定区域。 所选择的区域形成形成金属碳化物区域的区域。 互连层设置在金属碳化物区域上并被图案化以在金属碳化物区域的相对端形成端子。
-
公开(公告)号：US06709944B1
公开(公告)日：2004-03-23
申请号：US10261052
申请日：2002-09-30
IPC分类号： H01L2702
CPC分类号： H01C17/12 , B29C59/14 , H01C7/006 , H05K1/0346 , H05K1/167 , H05K3/381 , H05K3/388 , H05K2201/0154 , H05K2201/0317 , H05K2203/095 , H05K2203/1136
摘要： A technique for fabricating a resistor on a flexible substrate. Specifically, at least a portion of a polyimide substrate is activated by exposure to a ion sputter etch techniques. A metal layer is disposed over the activated portion of the substrate, thereby resulting in the formation of a highly resistive metal-carbide region. Interconnect layers are disposed over the metal-carbide region and patterned to form terminals at opposite ends of the metal carbide region. The metal-carbide region is patterned to form a resistor between the terminals. Alternatively, only a selected area of the polyimide substrate is activated. The selected area forms the area in which the metal-carbide region is formed. Interconnect layers are disposed over the metal-carbide region and patterned to form terminals at opposite ends of the metal-carbide region.
摘要翻译： 一种在柔性基板上制造电阻器的技术。 具体地，通过暴露于离子溅射蚀刻技术来活化聚酰亚胺基底的至少一部分。 金属层设置在基板的激活部分上，从而形成高电阻金属碳化物区域。 互连层设置在金属碳化物区域上并被图案化以在金属碳化物区域的相对端形成端子。 将金属碳化物区域图案化以在端子之间形成电阻器。 或者，仅激活聚酰亚胺基板的选定区域。 所选区域形成形成金属碳化物区域的区域。 互连层设置在金属碳化物区域上并被图案化以在金属碳化物区域的相对端形成端子。
-
6.发明授权Method of micromachining electromagnetically actuated current switches with polyimide reinforcement seals, and switches produced thereby 失效具有聚酰亚胺加强密封的微电机驱动电流开关的微加工方法以及由此产生的开关
公开(公告)号：US5531018A
公开(公告)日：1996-07-02
申请号：US169272
申请日：1993-12-20
CPC分类号： B81B7/0012 , H01H50/005 , B81B2201/018 , Y10T29/49105
摘要： An insulating layer with at least one via is provided over a metal plate. A sacrificial layer is applied over a portion of the insulating layer so that the sacrificial layer extends into the via. A metal bridge having at least one opening is provided over a portion of the sacrificial layer and a portion of the insulating layer so that the metal bridge extends over the via and the opening is situated adjacent a portion of the sacrificial layer. A reinforcing seal layer with a well is provided over the metal bridge so that the well is situated adjacent to at least a portion of the opening. The sacrificial layer is then removed.
摘要翻译： 具有至少一个通孔的绝缘层设置在金属板上。 牺牲层施加在绝缘层的一部分上，使得牺牲层延伸到通孔中。 在牺牲层的一部分和绝缘层的一部分上设置具有至少一个开口的金属桥，使得金属桥在通孔上方延伸，并且开口位于牺牲层的一部分附近。 在金属桥上提供了具有井的增强密封层，使得井位于与开口的至少一部分相邻的位置。 然后去除牺牲层。
-
公开(公告)号：US4845050A
公开(公告)日：1989-07-04
申请号：US121183
申请日：1987-11-16
IPC分类号： H01L21/285 , H01L21/768
CPC分类号： H01L21/28512 , H01L21/76879 , Y10S148/003
摘要： A conductive member consisting of a first conductor of an alloy of titanium and tungsten and a second conductor of a refractory metal such as molybdenum is sintered to a conductive member of silicon to a temperature in the range of 600.degree. C. to 650.degree. C. in a reducing atmosphere to form a low resistance contact.
摘要翻译： 将由钛和钨的合金的第一导体和诸如钼的难熔金属的第二导体组成的导电构件烧结到硅的导电构件至600℃至650℃的温度。 在还原气氛中形成低电阻接触。
-
8.发明授权Processes and gas mixtures for the reactive ion etching of aluminum and aluminum alloys 失效用于铝和铝合金反应离子蚀刻的工艺和气体混合物
公开(公告)号：US4444618A
公开(公告)日：1984-04-24
申请号：US471617
申请日：1983-03-03
申请人： Richard J. Saia , Bernard Gorowitz
发明人： Richard J. Saia , Bernard Gorowitz
IPC分类号： C23F4/00 , C23F1/12 , H01L21/02 , H01L21/302 , H01L21/3065 , H01L21/3213 , C23F1/02 , C03C15/00 , C03C25/06
CPC分类号： H01L21/02071
摘要： A method and gas mixture of boron trichloride, carbon tetrachloride and oxygen useful for the reactive ion etching of aluminum and aluminum alloys to form metallizations for microelectronic devices and circuits is provided. The method and gas mixture provide consistent induction periods, high etch rates, high selectivity between photoresist and silicon dioxide, and minimal loading effects with good dimensional control. Also provided is a two step, two gas mixture process particularly useful in preventing linewidth loss due to excessive resist erosion during long overetches wherein the boron trichloride, carbon tetrachloride and oxygen gas mixture is used for etching and subsequently a boron trichloride-oxygen gas mixture is used for the overetch.
摘要翻译： 提供了用于铝和铝合金的反应离子蚀刻的三氯化硼，四氯化碳和氧气的方法和气体混合物，以形成用于微电子器件和电路的金属化。 该方法和气体混合物提供一致的诱导期，高蚀刻速率，光致抗蚀剂和二氧化硅之间的高选择性，以及具有良好尺寸控制的最小负载效应。 还提供两步二气混合方法，其特别可用于防止在长时间过蚀刻过程中过度的抗蚀剂侵蚀引起的线宽损失，其中使用三氯化硼，四氯化碳和氧气混合物进行蚀刻，随后将三氯化硼 - 氧气混合物 用于overetch。
-
9.发明授权Method of filling interlevel dielectric via or contact holes in multilevel VLSI metallization structures 失效在多电平VLSI金属化结构中填充层间电介质通孔或接触孔的方法
公开(公告)号：US4824802A
公开(公告)日：1989-04-25
申请号：US104002
申请日：1987-10-02
申请人： Dale M. Brown , Bernard Gorowitz , Richard J. Saia
发明人： Dale M. Brown , Bernard Gorowitz , Richard J. Saia
IPC分类号： H01L21/768 , H01L21/283 , H01L21/312
CPC分类号： H01L21/7684 , H01L21/76877
摘要： A method compatible with very large scale integrated circuit fabrication processes is employed to provide an electrical connection between conductive layers separated by an insulative layer in integrated circuit devices. An intermediary metal such as molybdenum or tungsten is deposited by one or more methods so as to fill an opening in the insulative layer. A planarization resist may be applied on the substrate and the resulting configuration is planarizingly etched down to the insulative layer so as to provide a metal plug conductive layers. Deposition is by sputtering, evaporation, or by either selective or non-selective chemical vapor deposition. The process and structure provided herein significantly alleviates step coverage problems associated with aluminum and like materials which do not readily penetrate small VLSI circuit openings.
摘要翻译： 采用与大规模集成电路制造工艺兼容的方法来提供由集成电路器件中的绝缘层隔开的导电层之间的电连接。 通过一种或多种方法沉积诸如钼或钨的中间金属，以便填充绝缘层中的开口。 可以在衬底上施加平坦化抗蚀剂，并将所得结构平坦化地蚀刻到绝缘层上，以提供金属插头导电层。 通过溅射，蒸发或通过选择性或非选择性化学气相沉积沉积。 本文提供的方法和结构显着地减轻了与不容易穿透小型VLSI电路开口的铝和类似材料相关的步骤覆盖问题。
-
公开(公告)号：US4871617A
公开(公告)日：1989-10-03
申请号：US595800
申请日：1984-04-02
IPC分类号： H01L21/285 , H01L21/768
CPC分类号： H01L21/28512 , H01L21/76879 , Y10T428/12528 , Y10T428/12597 , Y10T428/12826 , Y10T428/1284
摘要： A conductive member consisting of a first conductor of an alloy of titanium and tungsten and a second conductor of a refractory metal such as molybdenum is sintered to a conductive member of silicon of low resistivity to form a low resistance contact therewith.
摘要翻译： 由钛和钨的合金的第一导体和诸如钼的难熔金属的第二导体组成的导电构件被烧结到具有低电阻率的硅的导电构件以与其形成低电阻接触。
-
-
-
-
-
-
-
-
-
搜索结果
28 条记录 (耗时 0.018 秒)