摘要:
A transmitter has a phase modulator and a phase locked loop that has a relatively high powered voltage controlled oscillator. The phase locked loop has a phase sensitive detector for comparing a phase comparison frequency derived from the voltage controlled oscillator output with a phase modulated intermediate frequency carrier derived from the phase modulator. The phase modulator has a reference frequency source, means for deriving four quadrature phase components of the reference frequency produced by the source and phase selection means controlled by complex modulation means for deriving the phase modulated intermediate frequency carrier by random interpolation between the four quadrature components.
摘要:
A semiconductor device comprises a two-stage differential amplifier, the amplifier comprising a first differential transistor pair whose transistors are coupled by their source electrodes and each receive an input signal, and a second differential transistor pair whose transistors are coupled by their source electrodes, each of these transistors receive the output of one of the branches of the first differential pair, and each supply an output. In the amplifier each branch of the second differential pair is arranged in series with a branch of the first differential pair so as to form two sub-circuits each including a transistor of the first pair with its load and a transistor of the second pair with its load in a manner such that the two transistors of each sub-circuit share the same current.
摘要:
A radiofrequency transmitting device delivers output signals having a chosen radiofrequency from input data split up into complementary phase data and amplitude data. This device includes a radiofrequency reference oscillator for outputting a reference signal having a fixed radiofrequency reference, and a digital phase modulator for synthesizing the chosen radiofrequency from the fixed radiofrequency reference and for phase modulating the reference signal with the phase data, in order to produce an output signal having the chosen radiofrequency.
摘要:
The jitter reduction circuit to reduce phase noise in a pulse train, comprises: —a resettable integrator (70) to integrate the pulse train, —a comparator (72) to compare the integrated pulse train with a reference level and to generate a modified pulse train with reduced phase noise, —a crossing time interval detector (94) configured to determine a discrete time interval during which the integrated pulse train crosses the reference level and to reset the integrator between two discrete time intervals determined consecutively.
摘要:
A vehicle latch assembly includes a housing having a frame plate. Also included is a claw disposed within the housing and operatively coupled to the frame plate, the claw configured to rotate between an open latch position and a closed latch position. Further included is a claw buffer disposed within the housing and configured to interact with the claw upon rotation to the closed latch position, the claw buffer including at least one abutment portion configured to engage the claw prior to reaching the closed latch position.
摘要:
A vehicle latch assembly includes a housing having a frame plate. Also included is a claw disposed within the housing and operatively coupled to the frame plate, the claw configured to rotate between an open latch position and a closed latch position. Further included is a claw buffer disposed within the housing and configured to interact with the claw upon rotation to the closed latch position, the claw buffer including at least one abutment portion configured to engage the claw prior to reaching the closed latch position.
摘要:
The electronic device (100) of the invention comprises a semiconductor device (30) and a low-pass filter (20), which are present in a stacked configuration, and which together include a phase locked loop. The low-pass filter is preferably embodied by vertical trench capacitors, and preferably comprises a drift compensation part. The device (100) can be suitably provided in an open loop architecture. In a preferred embodiment, the low-pass filter comprises a large capacitor (C2) and a small capacitor (C1) connected in parallel, the large capacitor (C2) being connected in series with a resistor (R1).
摘要:
The invention relates to an oscillator OSC intended to provide an output signal having a frequency which is variable as a function of a tuning voltage Vtun. The oscillator OSC includes a passive part having two series-arranged variable capacitances Cs, biased by the tuning voltage Vtun, and connected to a power supply VCC via two inductances Lext, and an active part having a first transistor T1 and a second transistor T2 whose collectors are connected to the output terminals C1 and C2 of the passive part, the base of one transistor being connected to the collector of the other transistor via a coupling capacitor Cfb. According to the invention, the passive part includes two high-pass filters, each being inserted between one of the output terminals S1 or S2 and one of the variable capacitances Cs, which allows a reduction of the active part's sensitivity to low-frequency noise.
摘要:
An integrated circuit includes a variable-gain amplifier having a first transistor with a load arranged as an inverted and controlled by a first signal of a first frequency, and also having a branch comprising a capacitance in series with a transistor which is arranged as a variable resistance and whose impedance is modulated by a second signal of a second frequency. In this circuit the variable-gain amplifier comprises a second transistor with a load arranged as an inverter and disposed in series with the first transistor and its load between this load and a d.c. supply, in such a manner that the two inverter transistors share the same current, the second inverter being controlled by the output of the first inverter, and the impedance modulated by the second signal is coupled to a node between the load of the first inverter transistor and the second inverter transistor in order to modulate the gain of the latter.
摘要:
Phase shifter to which are applied two signals in a phase opposition (v, -v) is constituted by a first series circuit of a resistor and a capacitor (R.sub.1, C.sub.1), and a second series circuit of a resistor and a capacitor (R.sub.2, C.sub.2). So that neither the relative amplitudes nor the relative phases of all the signals used at the outputs (5, 6, 7, 8) are degraded by the impedance of the stages that follow, the phase shifter includes a first network of a resistor and a capacitor connected in parallel (C.sub.3, R.sub.3), and a second network of a resistor and a capacitor connected in parallel (C.sub.4, R.sub.4). Both the four resistors and the four capacitors of the phase shifter are each substantially equal in value.