公开(公告)号：US07399709B1

公开(公告)日：2008-07-15

申请号：US10256401

申请日：2002-09-27

申请人： Burn-Jeng Lin ,  Hua-Tai Lin ,  Ru-Gun Liu ,  Tsai-Sheng Gau ,  Bang-Chien Ho

发明人： Burn-Jeng Lin ,  Hua-Tai Lin ,  Ru-Gun Liu ,  Tsai-Sheng Gau ,  Bang-Chien Ho

IPC分类号： H01L21/302

CPC分类号： H01L21/31144 ,  H01L21/0271 ,  H01L21/0332 ,  H01L21/0337 ,  H01L21/32139 ,  H01L21/76802 ,  H01L21/76808 ,  H01L2221/1026

摘要： An image reversal method is described that removes the etch resistance requirement from a resist. A high resolution resist pattern comprised of islands, lines, or trenches is formed with a large process window by exposing through one or more masks including phase edge masks and optionally with resolution enhancement techniques. A complementary material replacement (CMR) layer comprised of an organic polymer or material such as fluorosilicate glass which has a lower etch rate than the resist is coated over the resist pattern. CMR and resist layers are etched simultaneously to provide an image reversed pattern in the CMR layer which is etch transferred into a substrate. The method avoids edge roughness like bird's beak defects in the etched pattern and is useful for applications including forming contact holes in dielectric layers, forming polysilicon gates, and forming trenches in a damascene process. It is also valuable for direct write methods where an image reversal scheme is desired.

摘要翻译： 描述了去除抗蚀剂的耐蚀刻性要求的图像反转方法。 由岛，线或沟槽组成的高分辨率抗蚀剂图案通过暴露于包括相位边缘掩模的一个或多个掩模以及可选地具有分辨率增强技术而由大的工艺窗口形成。 由有机聚合物或诸如氟硅酸盐玻璃的材料组成的互补材料置换（CMR）层被涂覆在抗蚀剂图案上。 同时蚀刻CMR和抗蚀剂层以在CMR层中提供图像反转图案，其被蚀刻转移到衬底中。 该方法避免了像蚀刻图案中的鸟喙缺陷那样的边缘粗糙度，并且可用于包括在电介质层中形成接触孔，形成多晶硅栅极以及在镶嵌工艺中形成沟槽的应用。 对于需要图像反转方案的直接写入方法也是有价值的。

公开(公告)号：US07180572B2

公开(公告)日：2007-02-20

申请号：US11009505

申请日：2004-12-10

申请人： Jen-Chieh Shih ,  Burn-Jeng Lin ,  Tsai-Sheng Gau ,  Ru-Gun Liu ,  Chun-Kuang Chen ,  Chin-Hsiang Lin ,  Horng-Huei Tseng

发明人： Jen-Chieh Shih ,  Burn-Jeng Lin ,  Tsai-Sheng Gau ,  Ru-Gun Liu ,  Chun-Kuang Chen ,  Chin-Hsiang Lin ,  Horng-Huei Tseng

IPC分类号： G03B27/42

CPC分类号： G03F7/70341

摘要： An immersion optical projection system for photolithography is provided. A transparent plate is located between a last lens element and the wafer during a usage of the system. The transparent plate has a lens-side surface and a wafer-side surface. The system is adapted to have a layer of lens-side fluid located between the last lens element and the lens-side surface of the transparent plate, e.g., when the last lens element is operably located over the wafer during a photolithography process. The system is also adapted to have a layer of wafer-side fluid located between the wafer-side surface of the transparent plate and the wafer, during a usage of the system. The wafer-side fluid may or may not be fluidly connected to the lens-side fluid. The wafer-side fluid may or may not differ from the lens-side fluid.

摘要翻译： 提供了一种用于光刻的浸没式光学投影系统。 在使用系统期间，透明板位于最后一个透镜元件和晶片之间。 透明板具有透镜侧表面和晶片侧表面。 该系统适于具有位于最后透镜元件和透明板的透镜侧表面之间的透镜侧流体层，例如当光刻工艺期间最后一个透镜元件可操作地位于晶片上方时。 该系统还适于在系统的使用期间具有位于透明板的晶片侧表面和晶片之间的晶片侧流体层。 晶片侧流体可以或可以不流体地连接到透镜侧流体。 晶片侧流体可以或可以不与透镜侧流体不同。

公开(公告)号：US20050286030A1

公开(公告)日：2005-12-29

申请号：US11009505

申请日：2004-12-10

申请人： Jen-Chieh Shih ,  Burn-Jeng Lin ,  Tsai-Sheng Gau ,  Ru-Gun Liu ,  Chun-Kuang Chen ,  Chin-Hsiang Lin ,  Horng-Huei Tseng

发明人： Jen-Chieh Shih ,  Burn-Jeng Lin ,  Tsai-Sheng Gau ,  Ru-Gun Liu ,  Chun-Kuang Chen ,  Chin-Hsiang Lin ,  Horng-Huei Tseng

IPC分类号： G03B27/52 ,  G03F7/20

CPC分类号： G03F7/70341

摘要： An immersion optical projection system for photolithography is provided. A transparent plate is located between a last lens element and the wafer during a usage of the system. The transparent plate has a lens-side surface and a wafer-side surface. The system is adapted to have a layer of lens-side fluid located between the last lens element and the lens-side surface of the transparent plate, e.g., when the last lens element is operably located over the wafer during a photolithography process. The system is also adapted to have a layer of wafer-side fluid located between the wafer-side surface of the transparent plate and the wafer, during a usage of the system. The wafer-side fluid may or may not be fluidly connected to the lens-side fluid. The wafer-side fluid may or may not differ from the lens-side fluid.

摘要翻译： 提供了一种用于光刻的浸没式光学投影系统。 在使用系统期间，透明板位于最后一个透镜元件和晶片之间。 透明板具有透镜侧表面和晶片侧表面。 该系统适于具有位于最后透镜元件和透明板的透镜侧表面之间的透镜侧流体层，例如当光刻工艺期间最后一个透镜元件可操作地位于晶片上方时。 该系统还适于在系统的使用期间具有位于透明板的晶片侧表面和晶片之间的晶片侧流体层。 晶片侧流体可以或可以不流体地连接到透镜侧流体。 晶片侧流体可以或可以不与透镜侧流体不同。

公开(公告)号：US20070236857A1

公开(公告)日：2007-10-11

申请号：US11390944

申请日：2006-03-28

申请人： Burn-Jeng Lin ,  Tsai-Sheng Gau ,  Jeng-Horng Chen

发明人： Burn-Jeng Lin ,  Tsai-Sheng Gau ,  Jeng-Horng Chen

IPC分类号： H01T23/00

CPC分类号： H01L21/6838 ,  H01L21/67259 ,  H01L21/67288 ,  H01L21/68742

摘要： A level adjustment system. The level adjustment system includes an adjustable pin chuck, an evacuation device, a level detection device and a length control device. The adjustable pin chuck includes a base and a variable pin to support a substrate. The base includes a recess and an evacuation channel connected thereto. The variable pin is disposed in the recess. The evacuation device is connected to the evacuation channel to evacuate the recess, such that the substrate is attached to the base and variable pin. The level detection device is disposed on the adjustable pin chuck to detect the horizontality of a target surface of the substrate. The length control device is electrically connected to the level detection device and variable pin. The length control device changes the length of the variable pin to adjust level of the target surface of the substrate according to the detected horizontality.

摘要翻译： 水平调整系统。 液位调节系统包括可调节销卡盘，排气装置，液位检测装置和长度控制装置。 可调销卡盘包括基座和可变销以支撑基板。 底座包括与其连接的凹部和排气通道。 可变销设置在凹部中。 排气装置连接到排气通道以排出凹部，使得基板附接到基座和可变销。 电平检测装置设置在可调节销卡盘上以检测基板的目标表面的水平度。 长度控制装置电连接到电平检测装置和可变引脚。 长度控制装置根据检测到的水平度改变可变销的长度，以调整基板的目标表面的水平。

公开(公告)号：US07659964B2

公开(公告)日：2010-02-09

申请号：US11390944

申请日：2006-03-28

申请人： Burn-Jeng Lin ,  Tsai-Sheng Gau ,  Jeng-Horng Chen

发明人： Burn-Jeng Lin ,  Tsai-Sheng Gau ,  Jeng-Horng Chen

IPC分类号： G03B27/58

CPC分类号： H01L21/6838 ,  H01L21/67259 ,  H01L21/67288 ,  H01L21/68742

摘要： A level adjustment system. The level adjustment system includes an adjustable pin chuck, an evacuation device, a level detection device and a length control device. The adjustable pin chuck includes a base and a variable pin to support a substrate. The base includes a recess and an evacuation channel connected thereto. The variable pin is disposed in the recess. The evacuation device is connected to the evacuation channel to evacuate the recess, such that the substrate is attached to the base and variable pin. The level detection device is disposed on the adjustable pin chuck to detect the horizontality of a target surface of the substrate. The length control device is electrically connected to the level detection device and variable pin. The length control device changes the length of the variable pin to adjust level of the target surface of the substrate according to the detected horizontality.

摘要翻译： 水平调整系统。 液位调节系统包括可调节销卡盘，排气装置，液位检测装置和长度控制装置。 可调销卡盘包括基座和可变销以支撑基板。 基座包括与其连接的凹部和排气通道。 可变销设置在凹槽中。 排气装置连接到排气通道以排出凹部，使得基板附接到基座和可变销。 电平检测装置设置在可调节销卡盘上以检测基板的目标表面的水平度。 长度控制装置电连接到电平检测装置和可变引脚。 长度控制装置根据检测到的水平度改变可变销的长度，以调整基板的目标表面的水平。

公开(公告)号：US20050086629A1

公开(公告)日：2005-04-21

申请号：US10688500

申请日：2003-10-17

申请人： Jaw-Jung Shin ,  Chun-Kuang Chen ,  Tsai-Sheng Gau ,  Burn-Jeng Lin ,  Li-Chun Tien ,  Mi-Chang Chang ,  Yu-Jun Chou ,  Jan-Wen You ,  King-Chang Shu ,  Li-Jui Chen

发明人： Jaw-Jung Shin ,  Chun-Kuang Chen ,  Tsai-Sheng Gau ,  Burn-Jeng Lin ,  Li-Chun Tien ,  Mi-Chang Chang ,  Yu-Jun Chou ,  Jan-Wen You ,  King-Chang Shu ,  Li-Jui Chen

IPC分类号： G03F1/14 ,  G03F7/20 ,  G06F17/50

CPC分类号： G03F7/70641 ,  G03F1/44 ,  G03F7/70425 ,  G03F7/70433 ,  G03F7/705

摘要： A method of identifying and defining forbidden pitches or forbidden pitch ranges for a lithographic exposure tool under a given set of exposure conditions is provided. In the method, a computer simulation is performed, and its results are compared to frequently used pitches to see if such frequently used pitches may yield depth-of-focus (DOF) values greater than the focus budget for the exposure tool. If so, a verification test is performed by using a test mask and actually exposing a surface with the same pattern pitches simulated. From this, actual DOF values are obtained and compared to the focus budget of the exposure tool. Any pitches having a DOF value greater than the focus budget are designated as forbidden pitches. This forbidden pitch information may be integrated into a design rule to restrict the use of such forbidden pitches under the given exposure conditions where they are likely to arise.

公开(公告)号：US07479466B2

公开(公告)日：2009-01-20

申请号：US11486098

申请日：2006-07-14

申请人： Hsiao-Tzu Lu ,  Burn-Jeng Lin ,  Chin-Hsiang Lin ,  Kuei-Shun Chen ,  Tsai-Sheng Gau

发明人： Hsiao-Tzu Lu ,  Burn-Jeng Lin ,  Chin-Hsiang Lin ,  Kuei-Shun Chen ,  Tsai-Sheng Gau

IPC分类号： H01L21/00

CPC分类号： H01L21/67115 ,  H01L21/26513 ,  H01L21/2686

摘要： A method of heating-treating a semiconductor wafer is provided. In one embodiment, a first layer is formed over a first side of a substrate. A second layer is formed over the first layer and over a second side of the substrate and the wafer is then flash annealed. In another embodiment, a first layer is formed over a first side of a substrate and over a second side of the substrate. A second layer is formed over the first layers and the wafer is then flash annealed.

摘要翻译： 提供了一种加热处理半导体晶片的方法。 在一个实施例中，在衬底的第一侧上形成第一层。 第二层形成在衬底的第一层和第二侧上，然后闪光退火晶片。 在另一个实施例中，第一层形成在衬底的第一侧上并且在衬底的第二侧上方。 在第一层上形成第二层，然后闪晶退火晶片。

公开(公告)号：US20080014763A1

公开(公告)日：2008-01-17

申请号：US11486098

申请日：2006-07-14

申请人： Hsiao-Tzu Lu ,  Burn-Jeng Lin ,  Chin-Hsiang Lin ,  Kuei-Shun Chen ,  Tsai-Sheng Gau

发明人： Hsiao-Tzu Lu ,  Burn-Jeng Lin ,  Chin-Hsiang Lin ,  Kuei-Shun Chen ,  Tsai-Sheng Gau

IPC分类号： H01L21/00

CPC分类号： H01L21/67115 ,  H01L21/26513 ,  H01L21/2686

摘要： A method of heating-treating a semiconductor wafer is provided. In one embodiment, a first layer is formed over a first side of a substrate. A second layer is formed over the first layer and over a second side of the substrate and the wafer is then flash annealed. In another embodiment, a first layer is formed over a first side of a substrate and over a second side of the substrate. A second layer is formed over the first layers and the wafer is then flash annealed.

摘要翻译： 提供了一种加热处理半导体晶片的方法。 在一个实施例中，在衬底的第一侧上形成第一层。 第二层形成在衬底的第一层和第二侧上，然后闪光退火晶片。 在另一个实施例中，第一层形成在衬底的第一侧上并且在衬底的第二侧上方。 在第一层上形成第二层，然后闪晶退火晶片。

公开(公告)号：US07234128B2

公开(公告)日：2007-06-19

申请号：US10678788

申请日：2003-10-03

申请人： Tsai-Sheng Gau ,  Jaw-Jung Shin ,  Jan-Wen You ,  Burn-Jeng Lin

发明人： Tsai-Sheng Gau ,  Jaw-Jung Shin ,  Jan-Wen You ,  Burn-Jeng Lin

IPC分类号： G06F17/50 ,  G06F19/00 ,  G06K9/00

CPC分类号： G03F7/70616 ,  G03F7/70441 ,  G06T7/0004 ,  G06T2207/30148

摘要： A method for improving the critical dimension uniformity of a patterned feature on a wafer in semiconductor and mask fabrication is provided. In one embodiment, an evaluation means for evaluating the critical dimension distribution of a plurality of circuit layouts formed on the wafer, the plurality of circuit layouts defined by a mask is provided. A logic operation is performed on the plurality of circuit layouts to extract the patterned feature. The patterned feature is compared with design rules and if there is a deviation or difference between the patterned feature and the design rules, this difference is compensated for by adjusting photolithography adjustable parameters, such as, for example, mask-making.

摘要翻译： 提供了一种用于改善半导体和掩模制造中的晶片上的图案化特征的临界尺寸均匀性的方法。 在一个实施例中，提供了一种用于评估形成在晶片上的多个电路布局的临界尺寸分布的评估装置，提供了由掩模限定的多个电路布局。 对多个电路布局执行逻辑操作以提取图案化特征。 将图案特征与设计规则进行比较，并且如果图案特征和设计规则之间存在偏差或差异，则通过调整光刻可调参数（例如掩模制作）来补偿该差异。

公开(公告)号：US20070087291A1

公开(公告)日：2007-04-19

申请号：US11252499

申请日：2005-10-18

申请人： Tsai-Sheng Gau ,  Jaw-Jung Shin ,  Chun-Kuang Chen ,  Jan-Wen You ,  Burn-Jeng Lin

发明人： Tsai-Sheng Gau ,  Jaw-Jung Shin ,  Chun-Kuang Chen ,  Jan-Wen You ,  Burn-Jeng Lin

IPC分类号： G03F7/20

CPC分类号： G03F7/70466 ,  G03F1/70 ,  G03F7/203 ,  G03F7/70425

摘要： A method and associated masks for carrying out a lithographic imaging process to reduce or avoid a strong interference effect in off-axis illumination, the method including providing a resist layer on a substrate; illuminating a first group of line patterns through a first mask on the resist layer; illuminating a second group of line patterns through a second mask on the resist layer, the second group of line patterns oriented nonparallel with respect to the first group of line patterns; and, developing the illuminated resist layer.

摘要翻译： 一种用于进行光刻成像处理以减少或避免在离轴照明中的强干涉效应的方法和相关掩模，所述方法包括在基板上提供抗蚀剂层; 通过抗蚀剂层上的第一掩模照射第一组线图案; 通过抗蚀剂层上的第二掩模照射第二组线图案，第二组线条图案相对于第一组线图案取向不平行; 并且显影照射的抗蚀剂层。