利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

35 条记录 (耗时 0.032 秒)

    Semiconductor device and method of fabricating the same
    1.
    发明授权
    Semiconductor device and method of fabricating the same 有权
    半导体装置及其制造方法

    公开(公告)号：US08470703B2

    公开(公告)日：2013-06-25

    申请号：US13105195

    申请日：2011-05-11

    申请人： Byung-Hak Lee ,  Yu-Gyun Shin ,  Sang-Woo Lee ,  Sun-Ghil Lee ,  Jin-Bum Kim ,  Joon-Gon Lee

    发明人： Byung-Hak Lee ,  Yu-Gyun Shin ,  Sang-Woo Lee ,  Sun-Ghil Lee ,  Jin-Bum Kim ,  Joon-Gon Lee

    IPC分类号： H01L21/3205

    CPC分类号： H01L21/28518 ,  H01L21/823807 ,  H01L21/823814

    摘要： Methods of forming a semiconductor device include providing a substrate having an area including a source and a drain region of a transistor. A nickel (Ni) metal film is formed on the substrate area including the source and the drain region. A first heat-treatment process is performed including heating the substrate including the metal film from a first temperature to a second temperature at a first ramping rate and holding the substrate including the metal film at the second temperature for a first period of time. A second heat-treatment process is then performed including heating the substrate including the metal film from a third temperature to a fourth temperature at a second ramping rate and holding the substrate at the fourth temperature for a second period of time. The fourth temperature is different from the second temperature and the second period of time is different from the first period of time. The sequentially performed first and second heat-treatment processes convert the Ni metal layer on the source and drain regions into a NiSi layer on the source and drain regions and a NiSi2 layer between the NiSi layer and the source and drain regions.

    摘要翻译： 形成半导体器件的方法包括提供具有包括晶体管的源极和漏极区域的区域的衬底。 在包括源极和漏极区域的衬底区域上形成镍（Ni）金属膜。 执行第一热处理工艺，包括以第一斜率从第一温度至第二温度加热包括金属膜的基板，并将包含金属膜的基板在第二温度下保持第一时间段。 然后执行第二热处理工艺，包括以第二斜率从第三温度至第四温度加热包括金属膜的衬底，并将衬底保持在第四温度第二时间段。 第四温度与第二温度不同，第二时间段与第一时间段不同。 依次执行的第一和第二热处理工艺将源极和漏极区域上的Ni金属层转换成源极和漏极区域上的NiSi层以及NiSi层与源极和漏极区域之间的NiSi 2层。

    Semiconductor Device and Method of Fabricating the Same
    2.
    发明申请
    Semiconductor Device and Method of Fabricating the Same 有权
    半导体器件及其制造方法

    公开(公告)号：US20110306205A1

    公开(公告)日：2011-12-15

    申请号：US13105195

    申请日：2011-05-11

    申请人： Byung-Hak Lee ,  Yu-Gyun Shin ,  Sang-Woo Lee ,  Sun-Ghil Lee ,  Jin-Bum Kim ,  Joon-Gon Lee

    发明人： Byung-Hak Lee ,  Yu-Gyun Shin ,  Sang-Woo Lee ,  Sun-Ghil Lee ,  Jin-Bum Kim ,  Joon-Gon Lee

    IPC分类号： H01L21/3205

    CPC分类号： H01L21/28518 ,  H01L21/823807 ,  H01L21/823814

    摘要： Methods of forming a semiconductor device include providing a substrate having an area including a source and a drain region of a transistor. A nickel (Ni) metal film is formed on the substrate area including the source and the drain region. A first heat-treatment process is performed including heating the substrate including the metal film from a first temperature to a second temperature at a first ramping rate and holding the substrate including the metal film at the second temperature for a first period of time. A second heat-treatment process is then performed including heating the substrate including the metal film from a third temperature to a fourth temperature at a second ramping rate and holding the substrate at the fourth temperature for a second period of time. The fourth temperature is different from the second temperature and the second period of time is different from the first period of time. The sequentially performed first and second heat-treatment processes convert the Ni metal layer on the source and drain regions into a NiSi layer on the source and drain regions and a NiSi2 layer between the NiSi layer and the source and drain regions.

    摘要翻译： 形成半导体器件的方法包括提供具有包括晶体管的源极和漏极区域的区域的衬底。 在包括源极和漏极区域的衬底区域上形成镍（Ni）金属膜。 执行第一热处理工艺，包括以第一斜率从第一温度至第二温度加热包括金属膜的基板，并将包含金属膜的基板在第二温度下保持第一时间段。 然后执行第二热处理工艺，包括以第二斜率从第三温度至第四温度加热包括金属膜的衬底，并将衬底保持在第四温度第二时间段。 第四温度与第二温度不同，第二时间段与第一时间段不同。 依次执行的第一和第二热处理工艺将源极和漏极区域上的Ni金属层转换成源极和漏极区域上的NiSi层以及NiSi层与源极和漏极区域之间的NiSi 2层。

    METHOD OF FABRICATING SEMICONDUCTOR DEVICE
    3.
    发明申请
    METHOD OF FABRICATING SEMICONDUCTOR DEVICE 有权
    制造半导体器件的方法

    公开(公告)号：US20120171826A1

    公开(公告)日：2012-07-05

    申请号：US13243147

    申请日：2011-09-23

    申请人： Jin-Bum Kim ,  Chul-Sung Kim ,  Yu-Gyun Shin ,  Dae-Yong Kim ,  Joon-Gon Lee ,  Kwang-Young Lee

    发明人： Jin-Bum Kim ,  Chul-Sung Kim ,  Yu-Gyun Shin ,  Dae-Yong Kim ,  Joon-Gon Lee ,  Kwang-Young Lee

    IPC分类号： H01L21/8238

    CPC分类号： H01L21/823807 ,  H01L21/823814

    摘要： A method of fabricating a semiconductor includes providing a substrate having a first region and a second region defined therein, forming a first gate and a first source and drain region in the first region and forming a second gate and a second source and drain region in the second region, forming an epitaxial layer in the second source and drain region, forming a first metal silicide layer in the first source and drain region, forming an interlayer dielectric layer on the first region and the second region, forming a plurality of contact holes exposing the first metal silicide layer and the epitaxial layer while penetrating the interlayer dielectric layer, forming a second metal silicide layer in the exposed epitaxial layer, and forming a plurality of contacts contacting the first and second metal silicide layers by filling the plurality of contact holes.

    摘要翻译： 制造半导体的方法包括提供具有限定在其中的第一区域和第二区域的衬底，在第一区域中形成第一栅极和第一源极和漏极区域，并在第一区域中形成第二栅极和第二源极和漏极区域 在所述第二源极和漏极区域中形成外延层，在所述第一源极和漏极区域中形成第一金属硅化物层，在所述第一区域和所述第二区域上形成层间电介质层，形成多个接触孔， 第一金属硅化物层和外延层，同时穿透层间电介质层，在暴露的外延层中形成第二金属硅化物层，并且通过填充多个接触孔形成与第一和第二金属硅化物层接触的多个触点。

    Method of fabricating semiconductor device
    4.
    发明授权
    Method of fabricating semiconductor device 有权
    制造半导体器件的方法

    公开(公告)号：US08530303B2

    公开(公告)日：2013-09-10

    申请号：US13243147

    申请日：2011-09-23

    申请人： Jin-Bum Kim ,  Chul-Sung Kim ,  Yu-Gyun Shin ,  Dae-Yong Kim ,  Joon-Gon Lee ,  Kwang-Young Lee

    发明人： Jin-Bum Kim ,  Chul-Sung Kim ,  Yu-Gyun Shin ,  Dae-Yong Kim ,  Joon-Gon Lee ,  Kwang-Young Lee

    IPC分类号： H01L21/8249

    CPC分类号： H01L21/823807 ,  H01L21/823814

    摘要： A method of fabricating a semiconductor includes providing a substrate having a first region and a second region defined therein, forming a first gate and a first source and drain region in the first region and forming a second gate and a second source and drain region in the second region, forming an epitaxial layer in the second source and drain region, forming a first metal silicide layer in the first source and drain region, forming an interlayer dielectric layer on the first region and the second region, forming a plurality of contact holes exposing the first metal silicide layer and the epitaxial layer while penetrating the interlayer dielectric layer, forming a second metal silicide layer in the exposed epitaxial layer, and forming a plurality of contacts contacting the first and second metal silicide layers by filling the plurality of contact holes.

    摘要翻译： 制造半导体的方法包括提供具有限定在其中的第一区域和第二区域的衬底，在第一区域中形成第一栅极和第一源极和漏极区域，并在第一区域中形成第二栅极和第二源极和漏极区域 在所述第二源极和漏极区域中形成外延层，在所述第一源极和漏极区域中形成第一金属硅化物层，在所述第一区域和所述第二区域上形成层间电介质层，形成多个接触孔， 第一金属硅化物层和外延层，同时穿透层间电介质层，在暴露的外延层中形成第二金属硅化物层，并且通过填充多个接触孔形成与第一和第二金属硅化物层接触的多个触点。

    Method of manufacturing a semiconductor device
    6.
    发明授权
    Method of manufacturing a semiconductor device 有权
    制造半导体器件的方法

    公开(公告)号：US08877583B2

    公开(公告)日：2014-11-04

    申请号：US13728622

    申请日：2012-12-27

    申请人： Jin-Bum Kim ,  Young-Pil Kim ,  Kwan-Heum Lee ,  Sun-Ghil Lee

    发明人： Jin-Bum Kim ,  Young-Pil Kim ,  Kwan-Heum Lee ,  Sun-Ghil Lee

    IPC分类号： H01L21/8242 ,  H01L27/108 ,  H01L21/285 ,  H01L21/768 ,  H01L49/02

    CPC分类号： H01L21/285 ,  H01L21/76843 ,  H01L21/76849 ,  H01L21/76889 ,  H01L27/10855 ,  H01L28/91

    摘要： In a method of forming an ohmic layer of a DRAM device, the metal silicide layer between the storage node contact plug and the lower electrode of a capacitor is formed as the ohmic layer by a first heat treatment under a first temperature and an instantaneous second heat treatment under a second temperature higher than the first temperature. Thus, the metal silicide layer has a thermo-stable crystal structure and little or no agglomeration occurs on the metal silicide layer in the high temperature process. Accordingly, the sheet resistance of the ohmic layer may not increase in spite of the subsequent high temperature process.

    摘要翻译： 在形成DRAM器件的欧姆层的方法中，通过在第一温度和瞬时第二次加热下的第一次热处理将存储节点接触插塞和电容器的下部电极之间的金属硅化物层形成为欧姆层 在比第一温度高的第二温度下进行处理。 因此，金属硅化物层具有热稳定的晶体结构，并且在高温工艺中在金属硅化物层上几乎或不发生聚集。 因此，尽管随后的高温处理，欧姆层的薄层电阻也可能不增加。

    SEMICONDUCTOR DEVICE
    7.
    发明申请
    SEMICONDUCTOR DEVICE 审中-公开
    半导体器件

    公开(公告)号：US20100001349A1

    公开(公告)日：2010-01-07

    申请号：US12495501

    申请日：2009-06-30

    申请人： Jin-Bum Kim ,  Kwan-Heum Lee ,  Seung-Hun Lee ,  Byeong-Chan Lee ,  Sun-Ghil Lee

    发明人： Jin-Bum Kim ,  Kwan-Heum Lee ,  Seung-Hun Lee ,  Byeong-Chan Lee ,  Sun-Ghil Lee

    IPC分类号： H01L27/088

    CPC分类号： H01L21/823425 ,  H01L21/823418 ,  H01L27/11521 ,  H01L27/11524 ,  H01L29/40114 ,  H01L29/66825

    摘要： A semiconductor device can include a first gate electrode including a gate insulating pattern, a gate conductive pattern and a capping pattern that are sequentially stacked on a semiconductor substrate, and a first spacer of a low dielectric constant disposed on a lower sidewall of the first gate electrode. A second spacer of a high dielectric constant, that is greater than the low dielectric constant, is disposed on an upper sidewall of the first gate electrode above the first spacer.

    摘要翻译： 半导体器件可以包括第一栅电极，其包括依次层叠在半导体衬底上的栅极绝缘图案，栅极导电图案和覆盖图案，以及布置在第一栅极的下侧壁上的低介电常数的第一间隔物 电极。 高介电常数的第二间隔物大于低介电常数，设置在第一间隔物上方的第一栅电极的上侧壁上。

    METHODS OF FABRICATING SEMICONDUCTOR DEVICES WITH METAL-SEMICONDUCTOR COMPOUND SOURCE/DRAIN CONTACT REGIONS
    10.
    发明申请
    METHODS OF FABRICATING SEMICONDUCTOR DEVICES WITH METAL-SEMICONDUCTOR COMPOUND SOURCE/DRAIN CONTACT REGIONS 审中-公开
    用金属半导体复合源/漏极接触区制造半导体器件的方法

    公开(公告)号：US20100197089A1

    公开(公告)日：2010-08-05

    申请号：US12699491

    申请日：2010-02-03

    申请人： Jin-Bum Kim ,  Yu-Gyun Shin ,  Jung-Yun Won ,  In-Sun Jung ,  Jun-Ho Lee

    发明人： Jin-Bum Kim ,  Yu-Gyun Shin ,  Jung-Yun Won ,  In-Sun Jung ,  Jun-Ho Lee

    IPC分类号： H01L21/8238

    CPC分类号： H01L21/823814 ,  H01L21/28518 ,  H01L21/28525 ,  H01L21/2855 ,  H01L21/32053 ,  H01L21/76814 ,  H01L21/76838 ,  H01L21/76843 ,  H01L21/76855 ,  H01L21/76897 ,  H01L21/823871 ,  H01L23/53238 ,  H01L23/53266 ,  H01L29/665 ,  H01L29/66636 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Methods of fabricating semiconductor devices include forming a transistor on and/or in a semiconductor substrate, wherein the transistor includes a source/drain region and a gate pattern disposed on a channel region adjacent the source/drain region. An insulating layer is formed on the transistor and patterned to expose the source/drain region. A semiconductor source layer is formed on the exposed source/drain region and on an adjacent portion of the insulating layer. A metal source layer is formed on the semiconductor source layer. Annealing, is performed to form a first metal-semiconductor compound region on the source/drain region and a second metal-semiconductor compound region on the adjacent portion of the insulating layer. The first metal-semiconductor compound region may be thicker than the second metal-semiconductor compound region. The metal source layer may include a metal layer and a metal nitride barrier layer.

    摘要翻译： 制造半导体器件的方法包括在半导体衬底上和/或半导体衬底中形成晶体管，其中晶体管包括源极/漏极区域和设置在与源极/漏极区域相邻的沟道区域上的栅极图案。 在晶体管上形成绝缘层并图案化以暴露源/漏区域。 在暴露的源极/漏极区域和绝缘层的相邻部分上形成半导体源极层。 在半导体源层上形成金属源层。 进行退火以在源极/漏极区域上形成第一金属 - 半导体化合物区域和在绝缘层的相邻部分上形成第二金属 - 半导体化合物区域。 第一金属 - 半导体化合物区域可以比第二金属 - 半导体化合物区域厚。 金属源层可以包括金属层和金属氮化物阻挡层。