公开(公告)号：US09772459B2

公开(公告)日：2017-09-26

申请号：US14970231

申请日：2015-12-15

Applicant: CYNTEC CO., LTD.

Inventor： Ming-Che Wu

IPC: G02B6/12 ,  G02B6/42

CPC classification number: G02B6/4245 ,  G02B6/423 ,  G02B6/4246 ,  G02B6/428

Abstract: An optoelectronic module includes an interposer base having first and second recesses formed on a specified surface thereof; a joint material layer filled in the first and second recesses; a first optoelectronic element placed in the first recess and coupled to the interposer base via the joint material layer, wherein an optical signal is emitted from or passes through a lateral surface of the first optoelectronic element; and a second optoelectronic element placed in the second recess and coupled to the interposer base via the joint material layer, wherein a lateral surface of the second optoelectronic element faces the lateral surface of the first optoelectronic element for coupling to and receiving the optical signal emitted from or passing through the lateral surface of the first optoelectronic element. A fixture is used to place the first and second optoelectronic elements into the first and second recesses while controlling some critical distances.

公开(公告)号：US20170148955A1

公开(公告)日：2017-05-25

申请号：US14948366

申请日：2015-11-22

Applicant: CYNTEC CO., LTD.

Inventor： Ming-Che Wu

IPC: H01L33/48 ,  H01L21/768 ,  H01L21/683 ,  H01S5/022 ,  H01L31/02 ,  H01L31/0203 ,  H01L31/18 ,  H01L21/48 ,  H01L33/62

CPC classification number: H01L33/483 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/6835 ,  H01L21/76898 ,  H01L25/167 ,  H01L31/02005 ,  H01L31/0203 ,  H01L31/1876 ,  H01L33/486 ,  H01L33/62 ,  H01L2221/68327 ,  H01L2221/68381 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/49171 ,  H01L2933/0033 ,  H01L2933/0066 ,  H01S5/02208 ,  H01S5/02236 ,  H01L2924/00014

Abstract: The method of a wafer level packaging includes preparing a substrate, assembling a system on a first side of the substrate, and placing solder balls on a second side of the substrate. The soldering balls s fixed on to the second side of the substrate after the module has been assembled.

公开(公告)号：US10531558B2

公开(公告)日：2020-01-07

申请号：US14970218

申请日：2015-12-15

Applicant: CYNTEC CO., LTD.

Inventor： Ming-Che Wu

IPC: H05K1/02 ,  H05K3/30 ,  H05K3/46

Abstract: An electronic module having an electromagnetic shielding structure and its manufacturing method are provided. At first, a first substrate and a second substrate are separately provided. At least one electronic element and at least one connection pad are formed on a surface of the first substrate. The second substrate includes a conductive film and at least one conductive bump is formed on a surface of the conductive film. The first substrate and the second substrate are laminated together wherein the conductive bump is aligned with and connected to the connection pad to obtain the electronic module.

公开(公告)号：US09536841B2

公开(公告)日：2017-01-03

申请号：US14814525

申请日：2015-07-31

Applicant: CYNTEC CO., LTD.

Inventor： Ming-Che Wu

IPC: H01L21/00 ,  H01L23/06 ,  H01L23/48 ,  H01L23/552 ,  H01L21/78 ,  H01L23/00 ,  H01L23/498 ,  H01L23/31 ,  H01L21/56

CPC classification number: H01L23/552 ,  H01L21/561 ,  H01L21/78 ,  H01L23/3128 ,  H01L23/49805 ,  H01L23/49816 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/81005 ,  H01L2224/97 ,  H01L2924/15159 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2224/81 ,  H01L2924/00012

Abstract: A semiconductor package includes a substrate having a front side, a bottom side, and a sidewall along a perimeter of the substrate, a plurality of solder pads on the bottom side, at least one EM shielding contact structure on the bottom side and partially exposed on the sidewall, a semiconductor device mounted on the front side, a mold compound on the front side and covering the semiconductor device, and an EM shielding layer conformally covering the mold compound and the sidewall. The EM shielding layer is in direct contact with the exposed portion of the EM shielding contact structure on the sidewall.

Abstract translation: 半导体封装包括具有沿着基板的周边的前侧，底侧和侧壁的基板，底侧上的多个焊盘，底侧上的至少一个EM屏蔽接触结构，并部分地暴露在 侧壁，安装在前侧的半导体器件，前侧的模具化合物和覆盖半导体器件，以及保形地覆盖模具化合物和侧壁的EM屏蔽层。 EM屏蔽层与侧壁上的EM屏蔽接触结构的暴露部分直接接触。

公开(公告)号：US20160035680A1

公开(公告)日：2016-02-04

申请号：US14814525

申请日：2015-07-31

Applicant: CYNTEC CO., LTD.

Inventor： Ming-Che Wu

IPC: H01L23/552 ,  H01L21/48 ,  H01L21/56 ,  H01L21/78 ,  H01L23/498 ,  H01L23/31

CPC classification number: H01L23/552 ,  H01L21/561 ,  H01L21/78 ,  H01L23/3128 ,  H01L23/49805 ,  H01L23/49816 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/81005 ,  H01L2224/97 ,  H01L2924/15159 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2224/81 ,  H01L2924/00012

Abstract: A semiconductor package includes a substrate having a front side, a bottom side, and a sidewall along a perimeter of the substrate, a plurality of solder pads on the bottom side, at least one EM shielding contact structure on the bottom side and partially exposed on the sidewall, a semiconductor device mounted on the front side, a mold compound on the front side and covering the semiconductor device, and an EM shielding layer conformally covering the mold compound and the sidewall. The EM shielding layer is in direct contact with the exposed portion of the EM shielding contact structure on the sidewall.

Abstract translation: 半导体封装包括具有沿着基板的周边的前侧，底侧和侧壁的基板，底侧上的多个焊盘，底侧上的至少一个EM屏蔽接触结构，并部分地暴露在 侧壁，安装在前侧的半导体器件，前侧的模具化合物和覆盖半导体器件，以及保形地覆盖模具化合物和侧壁的EM屏蔽层。 EM屏蔽层与侧壁上的EM屏蔽接触结构的暴露部分直接接触。