公开(公告)号：US20050035423A1

公开(公告)日：2005-02-17

申请号：US10887244

申请日：2004-07-08

申请人： Cartens Ahrens ,  Ulf Bartl ,  Bernd Eisener ,  Wolfgang Hartung ,  Christian Herzum ,  Raidmund Peichl ,  Stefan Pompl ,  Hubert Werthmann

发明人： Cartens Ahrens ,  Ulf Bartl ,  Bernd Eisener ,  Wolfgang Hartung ,  Christian Herzum ,  Raidmund Peichl ,  Stefan Pompl ,  Hubert Werthmann

IPC分类号： H01L21/329 ,  H01L29/417 ,  H01L29/872 ,  H01L29/47 ,  H01L21/28

CPC分类号： H01L29/66143 ,  H01L29/417 ,  H01L29/872

摘要： An electronic device includes a substrate, an insulating layer arranged on the substrate, the insulating layer having an opening in an area of the surface of the substrate, an active layer arranged within the opening on the surface of the substrate, the active layer including a guard ring in those areas of the surface and of the active layer which are adjacent to the insulating layer, and a contacting layer arranged on an area of the active layer, the contact layer being adjacent to an area of the guard ring. The device may be produced by a process of three-fold self-alignment, to be precise utilizing a spacer process by means of which a diffusion source having a lateral extension far below the lithography limit is made possible.

摘要翻译： 电子器件包括衬底，布置在衬底上的绝缘层，所述绝缘层在衬底的表面的区域中具有开口，布置在衬底的表面的开口内的有源层，所述活性层包括 保护环在与绝缘层相邻的表面和有源层的那些区域中，以及接触层，布置在有源层的区域上，接触层邻近保护环的区域。 该装置可以通过三重自对准的方法制造，以精确地利用间隔物工艺，通过该间隔工艺，具有远低于光刻极限的横向延伸的扩散源成为可能。

公开(公告)号：US07307329B2

公开(公告)日：2007-12-11

申请号：US10887244

申请日：2004-07-08

申请人： Cartens Ahrens ,  Ulf Bartl ,  Bernd Eisener ,  Wolfgang Hartung ,  Christian Herzum ,  Raimund Peichl ,  Stefan Pompl ,  Hubert Werthmann

发明人： Cartens Ahrens ,  Ulf Bartl ,  Bernd Eisener ,  Wolfgang Hartung ,  Christian Herzum ,  Raimund Peichl ,  Stefan Pompl ,  Hubert Werthmann

IPC分类号： H01L29/47 ,  H01L21/28

CPC分类号： H01L29/66143 ,  H01L29/417 ,  H01L29/872

摘要： An electronic device includes a substrate, an insulating layer arranged on the substrate, the insulating layer having an opening in an area of the surface of the substrate, an active layer arranged within the opening on the surface of the substrate, the active layer including a guard ring in those areas of the surface and of the active layer which are adjacent to the insulating layer, and a contacting layer arranged on an area of the active layer, the contact layer being adjacent to an area of the guard ring. The device may be produced by a process of three-fold self-alignment, to be precise utilizing a spacer process by means of which a diffusion source having a lateral extension far below the lithography limit is made possible.

摘要翻译： 电子器件包括衬底，布置在衬底上的绝缘层，所述绝缘层在衬底的表面的区域中具有开口，布置在衬底的表面的开口内的有源层，所述活性层包括 保护环在与绝缘层相邻的表面和有源层的那些区域中，以及接触层，布置在有源层的区域上，接触层邻近保护环的区域。 该装置可以通过三重自对准的方法制造，以精确地利用间隔物工艺，通过该间隔工艺，具有远低于光刻极限的横向延伸的扩散源成为可能。

公开(公告)号：US06873242B2

公开(公告)日：2005-03-29

申请号：US10797221

申请日：2004-03-10

申请人： Carsten Ahrens ,  Ulf Bartl ,  Wolfgang Hartung ,  Reinhard Losehand ,  Hubert Werthmann

发明人： Carsten Ahrens ,  Ulf Bartl ,  Wolfgang Hartung ,  Reinhard Losehand ,  Hubert Werthmann

IPC分类号： H01F17/00 ,  H01F41/04 ,  H01L23/522 ,  H01L23/64 ,  H01F5/00

CPC分类号： H01F17/0006 ,  H01F17/0013 ,  H01F17/0033 ,  H01F41/042 ,  H01F41/046 ,  H01L23/5227 ,  H01L23/645 ,  H01L2924/0002 ,  H01L2924/3011 ,  Y10T428/12465 ,  Y10T428/32 ,  H01L2924/00

摘要： The magnetic component uses at least two different layers of magnetic material for carrying and amplifying the magnetic flux. The use of two different layers which may, however, have the same material composition allows the magnetic conductors to form a magnetic circuit with a locally matched domain alignment. The magnetic component accordingly allows considerable improvements to be achieved in the component parameter, in particular a considerable increase in the Q-factor.

摘要翻译： 磁性部件使用至少两层不同的磁性材料层来承载和放大磁通量。 然而，使用可能具有相同材料组成的两个不同层允许磁导体形成具有局部匹配的畴对准的磁路。 相应地，磁性部件允许在部件参数中实现相当大的改进，特别是Q因子的显着增加。

公开(公告)号：US20070085143A1

公开(公告)日：2007-04-19

申请号：US11540489

申请日：2006-09-29

申请人： Bernd Eisener ,  Hubert Werthmann

发明人： Bernd Eisener ,  Hubert Werthmann

IPC分类号： H01L23/62

CPC分类号： H01L29/861 ,  H01L27/0255 ,  H01L29/0692

摘要： A semiconductor structure for draining an overvoltage pulse comprises a first semiconductor region having a first doping type and a semiconductor layer arranged adjacent the first semiconductor region. The semiconductor layer includes an isolation structure configured to electrically isolate a second semiconductor region from a surrounding region. The second semiconductor region has a second doping type. A third semiconductor region having the first doping type is arranged adjacent the second semiconductor region and is disposed within an area limited by the isolation structure. A first contacting structure is configured to provide an electrical contact with the first semiconductor region, and a second contacting structure is configured to provide an electrical contact with the third semiconductor region. The first and second semiconductor regions are more highly doped than the second semiconductor region.

摘要翻译： 用于排出过电压脉冲的半导体结构包括具有第一掺杂类型的第一半导体区域和邻近第一半导体区域布置的半导体层。 半导体层包括被配置为将第二半导体区域与周围区域电隔离的隔离结构。 第二半导体区域具有第二掺杂型。 具有第一掺杂类型的第三半导体区域被布置成与第二半导体区域相邻并且被布置在由隔离结构限制的区域内。 第一接触结构被配置为提供与第一半导体区域的电接触，并且第二接触结构被配置为提供与第三半导体区域的电接触。 第一和第二半导体区域比第二半导体区域更高掺杂。

公开(公告)号：US06842083B2

公开(公告)日：2005-01-11

申请号：US10268176

申请日：2002-10-10

申请人： Reinhard Losehand ,  Hubert Werthmann ,  Ulf Bartl

发明人： Reinhard Losehand ,  Hubert Werthmann ,  Ulf Bartl

IPC分类号： H01L27/04 ,  H01L21/822 ,  H03B1/00 ,  H03B5/08 ,  H03B5/12 ,  H03J3/18 ,  H03J3/20 ,  H03L7/00

CPC分类号： H03J3/20 ,  H03B2201/0266 ,  H03J3/185 ,  H03J2200/10

摘要： A conductor network includes trimming capacitors and is connected in parallel with a resonant circuit. The trimming capacitors can be connected in parallel with the variable-capacitance diodes in the resonant circuit through PIN diodes, enabling trimming of the resonant circuit.

摘要翻译： 导体网络包括微调电容器并且与谐振电路并联连接。 微调电容器可以通过PIN二极管与谐振电路中的可变电容二极管并联连接，从而能够修整谐振电路。

公开(公告)号：US20130026601A1

公开(公告)日：2013-01-31

申请号：US13194721

申请日：2011-07-29

申请人： Gabriele Bettineschi ,  Uwe Seidel ,  Wolfgang Walter ,  Michael Schrenk ,  Hubert Werthmann

发明人： Gabriele Bettineschi ,  Uwe Seidel ,  Wolfgang Walter ,  Michael Schrenk ,  Hubert Werthmann

IPC分类号： H01L23/525 ,  H01L21/82

CPC分类号： H01L21/76886 ,  H01L23/5256 ,  H01L2224/13

摘要： A semiconductor device comprises a semiconductor substrate, an anorganic isolation layer on the semiconductor substrate and a metallization layer on the anorganic isolation layer. The metallization layer comprises a fuse structure. At least in an area of the fuse structure the metallization layer and the anorganic isolation layer have a common interface.

摘要翻译： 半导体器件包括半导体衬底，半导体衬底上的无机隔离层和有机隔离层上的金属化层。 金属化层包括熔丝结构。 至少在熔丝结构的区域中，金属化层和有机隔离层具有共同的界面。

公开(公告)号：US08659118B2

公开(公告)日：2014-02-25

申请号：US13194721

申请日：2011-07-29

申请人： Gabriele Bettineschi ,  Uwe Seidel ,  Wolfgang Walter ,  Michael Schrenk ,  Hubert Werthmann

发明人： Gabriele Bettineschi ,  Uwe Seidel ,  Wolfgang Walter ,  Michael Schrenk ,  Hubert Werthmann

IPC分类号： H01L21/82

CPC分类号： H01L21/76886 ,  H01L23/5256 ,  H01L2224/13

摘要： A semiconductor device comprises a semiconductor substrate, an anorganic isolation layer on the semiconductor substrate and a metallization layer on the anorganic isolation layer. The metallization layer comprises a fuse structure. At least in an area of the fuse structure the metallization layer and the anorganic isolation layer have a common interface.

摘要翻译： 半导体器件包括半导体衬底，半导体衬底上的无机隔离层和有机隔离层上的金属化层。 金属化层包括熔丝结构。 至少在熔丝结构的区域中，金属化层和有机隔离层具有共同的界面。

公开(公告)号：US06448162B1

公开(公告)日：2002-09-10

申请号：US09722081

申请日：2000-11-27

申请人： Reinhard Losehand ,  Hubert Werthmann

发明人： Reinhard Losehand ,  Hubert Werthmann

IPC分类号： H01L2128

CPC分类号： H01L29/66143 ,  H01L29/872

摘要： A method for producing a Schottky diode formed of a doped guard ring in an edge area of the Schottky contact is described. The guard ring is produced by depositing a high barrier material, especially made of platinum, on the surface of the semiconductor layer. The surface is provided with a structured masking layer beforehand, and which is subsequently etch-backing.

摘要翻译： 描述了在肖特基接触的边缘区域中由掺杂保护环形成的肖特基二极管的制造方法。 保护环通过在半导体层的表面上沉积高阻挡材料，特别是由铂制成。 表面预先设置有结构化掩模层，随后蚀刻背衬。

公开(公告)号：US06949812B2

公开(公告)日：2005-09-27

申请号：US10253197

申请日：2002-09-24

申请人： Reinhard Losehand ,  Hubert Werthmann

发明人： Reinhard Losehand ,  Hubert Werthmann

IPC分类号： H01L21/331 ,  H01L21/20 ,  H01L21/205 ,  H01L21/329 ,  H01L21/822 ,  H01L21/8222 ,  H01L27/04 ,  H01L27/06 ,  H01L29/06 ,  H01L29/732 ,  H01L29/861 ,  H01L29/868 ,  H01L29/93 ,  H01L31/075 ,  H01L21/8238 ,  H01L29/00

CPC分类号： H01L29/93 ,  H01L29/0615 ,  H01L29/732 ,  H01L29/868

摘要： A semiconductor structure for high frequency operation has a substrate with a doped well formed therein and a buffer layer made of a substrate material covers the well. The buffer layer is made of an undoped material and is disposed on a top side of the well for inhibiting an outdiffusion of a dopant from the well. At least a portion of the substrate is not covered by the buffer layer.

摘要翻译： 用于高频操作的半导体结构具有其中形成有掺杂阱的衬底，并且由衬底材料制成的缓冲层覆盖阱。 缓冲层由未掺杂的材料制成并且设置在阱的顶侧，用于抑制来自阱的掺杂剂的向外扩散。 衬底的至少一部分不被缓冲层覆盖。

公开(公告)号：US06551911B1

公开(公告)日：2003-04-22

申请号：US09491767

申请日：2000-01-26

申请人： Reinhard Losehand ,  Hubert Werthmann

发明人： Reinhard Losehand ,  Hubert Werthmann

IPC分类号： H01L2128

CPC分类号： H01L29/66143 ,  H01L29/872

摘要： A method for producing Schottky diodes having a protective ring in an edge region of a Schottky contact. The protective ring is produced by a protective ring material that is deposited onto a surface of a semiconductor layer, which surface is provided with a patterned masking layer beforehand, and the protective ring material subsequently being siliconized. In this case, the protective ring material constitutes a metal, in particular a high barrier metal, which has, in particular, platinum.

摘要翻译： 一种在肖特基接触的边缘区域中制造具有保护环的肖特基二极管的方法。 保护环由沉积在半导体层的表面上的保护环材料制成，该表面预先设置有图案化掩模层，并且保护环材料随后被硅化。 在这种情况下，保护环材料构成特别是铂的金属，特别是高阻隔性金属。