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公开(公告)号：US20050035423A1
公开(公告)日：2005-02-17
申请号：US10887244
申请日：2004-07-08
申请人： Cartens Ahrens , Ulf Bartl , Bernd Eisener , Wolfgang Hartung , Christian Herzum , Raidmund Peichl , Stefan Pompl , Hubert Werthmann
发明人： Cartens Ahrens , Ulf Bartl , Bernd Eisener , Wolfgang Hartung , Christian Herzum , Raidmund Peichl , Stefan Pompl , Hubert Werthmann
IPC分类号： H01L21/329 , H01L29/417 , H01L29/872 , H01L29/47 , H01L21/28
CPC分类号： H01L29/66143 , H01L29/417 , H01L29/872
摘要： An electronic device includes a substrate, an insulating layer arranged on the substrate, the insulating layer having an opening in an area of the surface of the substrate, an active layer arranged within the opening on the surface of the substrate, the active layer including a guard ring in those areas of the surface and of the active layer which are adjacent to the insulating layer, and a contacting layer arranged on an area of the active layer, the contact layer being adjacent to an area of the guard ring. The device may be produced by a process of three-fold self-alignment, to be precise utilizing a spacer process by means of which a diffusion source having a lateral extension far below the lithography limit is made possible.
摘要翻译： 电子器件包括衬底，布置在衬底上的绝缘层，所述绝缘层在衬底的表面的区域中具有开口，布置在衬底的表面的开口内的有源层，所述活性层包括 保护环在与绝缘层相邻的表面和有源层的那些区域中，以及接触层，布置在有源层的区域上，接触层邻近保护环的区域。 该装置可以通过三重自对准的方法制造，以精确地利用间隔物工艺，通过该间隔工艺，具有远低于光刻极限的横向延伸的扩散源成为可能。
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公开(公告)号：US07307329B2
公开(公告)日：2007-12-11
申请号：US10887244
申请日：2004-07-08
申请人： Cartens Ahrens , Ulf Bartl , Bernd Eisener , Wolfgang Hartung , Christian Herzum , Raimund Peichl , Stefan Pompl , Hubert Werthmann
发明人： Cartens Ahrens , Ulf Bartl , Bernd Eisener , Wolfgang Hartung , Christian Herzum , Raimund Peichl , Stefan Pompl , Hubert Werthmann
CPC分类号： H01L29/66143 , H01L29/417 , H01L29/872
摘要： An electronic device includes a substrate, an insulating layer arranged on the substrate, the insulating layer having an opening in an area of the surface of the substrate, an active layer arranged within the opening on the surface of the substrate, the active layer including a guard ring in those areas of the surface and of the active layer which are adjacent to the insulating layer, and a contacting layer arranged on an area of the active layer, the contact layer being adjacent to an area of the guard ring. The device may be produced by a process of three-fold self-alignment, to be precise utilizing a spacer process by means of which a diffusion source having a lateral extension far below the lithography limit is made possible.
摘要翻译： 电子器件包括衬底，布置在衬底上的绝缘层，所述绝缘层在衬底的表面的区域中具有开口，布置在衬底的表面的开口内的有源层，所述活性层包括 保护环在与绝缘层相邻的表面和有源层的那些区域中，以及接触层，布置在有源层的区域上，接触层邻近保护环的区域。 该装置可以通过三重自对准的方法制造，以精确地利用间隔物工艺，通过该间隔工艺，具有远低于光刻极限的横向延伸的扩散源成为可能。
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公开(公告)号：US08318575B2
公开(公告)日：2012-11-27
申请号：US13022411
申请日：2011-02-07
申请人： Wolfgang Lehnert , Stefan Pompl , Markus Meyer
发明人： Wolfgang Lehnert , Stefan Pompl , Markus Meyer
CPC分类号： H01L29/04 , H01L21/0245 , H01L21/02513 , H01L21/02532 , H01L21/0262 , H01L21/28035 , H01L21/763 , H01L21/823828 , H01L28/60 , H01L29/16 , H01L29/51 , H01L29/7833 , H01L29/945
摘要： In one embodiment a method of forming a compressive polycrystalline semiconductive material layer is disclosed. The method comprises forming a polycrystalline semiconductive seed layer over a substrate and forming a silicon layer by depositing silicon directly on the polycrystalline silicon seed layer under amorphous process conditions at a temperature below 600 C.
摘要翻译： 公开了一种形成压缩多晶半导体材料层的方法。 该方法包括在衬底上形成多晶半导体种子层并通过在低于600℃的温度的无定形工艺条件下将硅直接沉积在多晶硅籽晶层上形成硅层。
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公开(公告)号：US20120202327A1
公开(公告)日：2012-08-09
申请号：US13022411
申请日：2011-02-07
申请人： Wolfgang Lehnert , Stefan Pompl , Markus Meyer
发明人： Wolfgang Lehnert , Stefan Pompl , Markus Meyer
IPC分类号： H01L21/336 , H01L21/02 , H01L21/20
CPC分类号： H01L29/04 , H01L21/0245 , H01L21/02513 , H01L21/02532 , H01L21/0262 , H01L21/28035 , H01L21/763 , H01L21/823828 , H01L28/60 , H01L29/16 , H01L29/51 , H01L29/7833 , H01L29/945
摘要： In one embodiment a method of forming a compressive polycrystalline semiconductive material layer is disclosed. The method comprises forming a polycrystalline semiconductive seed layer over a substrate and forming a silicon layer by depositing silicon directly on the polycrystalline silicon seed layer under amorphous process conditions at a temperature below 600 C.
摘要翻译： 公开了一种形成压缩多晶半导体材料层的方法。 该方法包括在衬底上形成多晶半导体种子层并通过在低于600℃的温度的无定形工艺条件下将硅直接沉积在多晶硅籽晶层上形成硅层。
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公开(公告)号：US07208814B2
公开(公告)日：2007-04-24
申请号：US10922367
申请日：2004-08-20
申请人： Stefan Pompl
发明人： Stefan Pompl
IPC分类号： H01L29/00
CPC分类号： H01L28/20 , H01L27/0802 , Y10S257/904
摘要： A resistive device includes a resistive region of a semiconductor material that includes a first region and a second region, wherein the first region has a higher dopant concentration than the second region, and wherein a resistance-determining width of a current path through the first region is determined by a portion of a doping boundary between the first region and the second region.
摘要翻译： 电阻器件包括半导体材料的电阻区域，其包括第一区域和第二区域，其中所述第一区域具有比所述第二区域更高的掺杂剂浓度，并且其中通过所述第一区域的电流路径的电阻确定宽度 由第一区域和第二区域之间的掺杂边界的一部分决定。
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公开(公告)号：US09111781B2
公开(公告)日：2015-08-18
申请号：US13405092
申请日：2012-02-24
申请人： Thomas Popp , Stefan Pompl , Rudolf Berger
发明人： Thomas Popp , Stefan Pompl , Rudolf Berger
CPC分类号： H01L28/90 , H01L27/0805
摘要： A method of forming a semiconductor device includes forming an opening having a sidewall in a substrate and forming a first epitaxial layer in the opening. The first epitaxial layer is formed in a first portion of the sidewall without growing in a second portion of the sidewall. A second epitaxial layer is formed in the opening after forming the first epitaxial layer. The second epitaxial layer is formed in the second portion of the sidewall. The first epitaxial layer is removed after forming the second epitaxial layer.
摘要翻译： 形成半导体器件的方法包括在衬底中形成具有侧壁的开口，并在开口中形成第一外延层。 第一外延层形成在侧壁的第一部分中，而不在侧壁的第二部分中生长。 在形成第一外延层之后，在开口中形成第二外延层。 第二外延层形成在侧壁的第二部分中。 在形成第二外延层之后去除第一外延层。
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公开(公告)号：US20120181656A1
公开(公告)日：2012-07-19
申请号：US13007392
申请日：2011-01-14
IPC分类号： H01L29/92 , H01L27/08 , H01L21/329
CPC分类号： H01L28/60 , H01L27/10829 , H01L27/10861 , H01L29/66181 , H01L29/945
摘要： A method for manufacturing a semiconductor device and a semiconductor device are disclosed. The method comprises forming a trench in a substrate, partially filling the trench with a first semiconductive material, forming an interface along a surface of the first semiconductive material, and filling the trench with a second semiconductive material. The semiconductor device includes a first electrode arranged along sidewalls of a trench and a dielectric arranged over the first electrode. The semiconductor device further includes a second electrode at least partially filling the trench, wherein the second electrode comprises an interface within the second electrode.
摘要翻译： 公开了半导体器件和半导体器件的制造方法。 该方法包括在衬底中形成沟槽，用第一半导体材料部分地填充沟槽，沿着第一半导体材料的表面形成界面，并用第二半导体材料填充沟槽。 半导体器件包括沿着沟槽的侧壁布置的第一电极和布置在第一电极上的电介质。 所述半导体器件还包括至少部分地填充所述沟槽的第二电极，其中所述第二电极包括所述第二电极内的界面。
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公开(公告)号：US08685828B2
公开(公告)日：2014-04-01
申请号：US13007392
申请日：2011-01-14
IPC分类号： H01L21/20
CPC分类号： H01L28/60 , H01L27/10829 , H01L27/10861 , H01L29/66181 , H01L29/945
摘要： A method for manufacturing a semiconductor device and a semiconductor device are disclosed. The method comprises forming a trench in a substrate, partially filling the trench with a first semiconductive material, forming an interface along a surface of the first semiconductive material, and filling the trench with a second semiconductive material. The semiconductor device includes a first electrode arranged along sidewalls of a trench and a dielectric arranged over the first electrode. The semiconductor device further includes a second electrode at least partially filling the trench, wherein the second electrode comprises an interface within the second electrode.
摘要翻译： 公开了半导体器件和半导体器件的制造方法。 该方法包括在衬底中形成沟槽，用第一半导体材料部分地填充沟槽，沿着第一半导体材料的表面形成界面，并用第二半导体材料填充沟槽。 半导体器件包括沿着沟槽的侧壁布置的第一电极和布置在第一电极上的电介质。 所述半导体器件还包括至少部分地填充所述沟槽的第二电极，其中所述第二电极包括所述第二电极内的界面。
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公开(公告)号：US20090122460A1
公开(公告)日：2009-05-14
申请号：US11938436
申请日：2007-11-12
CPC分类号： H01G4/008 , H01G4/1254 , H01G9/0525 , H01G9/07 , H01G9/15 , H01L21/76877 , H01L28/84
摘要： A semiconductor device includes a semiconductor layer with a first electrode formed by a sintered, conductive, porous granulate and formed in or on the semiconductor layer or in or on at least one insulating layer arranged on the semiconductor layer; furthermore dielectric material covering the surface of the sintered, conductive, porous granulate, and a second electrode at least partially covering the dielectric material, wherein the dielectric material electrically insulates the second electrode from the first electrode.
摘要翻译： 半导体器件包括具有第一电极的半导体层，该第一电极由烧结导电多孔颗粒形成并形成在半导体层中或半导体层上或布置在半导体层上的至少一个绝缘层中或其上; 还包括覆盖烧结的，导电的，多孔的颗粒的表面的电介质材料和至少部分地覆盖介电材料的第二电极，其中介电材料使第二电极与第一电极电绝缘。
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公开(公告)号：US20050077579A1
公开(公告)日：2005-04-14
申请号：US10922367
申请日：2004-08-20
申请人： Stefan Pompl
发明人： Stefan Pompl
IPC分类号： H01L21/02 , H01L27/08 , H01L29/76 , H01L29/94 , H01L31/062
CPC分类号： H01L28/20 , H01L27/0802 , Y10S257/904
摘要： A resistive device includes a resistive region of a semiconductor material that includes a first region and a second region, wherein the first region has a higher dopant concentration than the second region, and wherein a resistance-determining width of a current path through the first region is determined by a portion of a doping boundary between the first region and the second region.
摘要翻译： 电阻器件包括半导体材料的电阻区域，其包括第一区域和第二区域，其中所述第一区域具有比所述第二区域更高的掺杂剂浓度，并且其中通过所述第一区域的电流路径的电阻确定宽度 由第一区域和第二区域之间的掺杂边界的一部分决定。
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