公开(公告)号：US06696741B1

公开(公告)日：2004-02-24

申请号：US09443742

申请日：1999-11-19

申请人： Cesare Ronsisvalle ,  Piero Giorgio Fallica ,  Davide Patti

发明人： Cesare Ronsisvalle ,  Piero Giorgio Fallica ,  Davide Patti

IPC分类号： H01L2358

CPC分类号： H01L29/7802 ,  H01L21/762 ,  H01L29/0653

摘要： PN junction structure including a first junction region of a first conductivity type, and a second junction region of a second conductivity type, wherein between said first and second junction regions a grid of buried insulating material regions is provided.

摘要翻译： PN结结构，其包括第一导电类型的第一结区域和第二导电类型的第二结区域，其中在所述第一和第二接合区域之间提供掩埋绝缘材料区域格栅。

公开(公告)号：US07868382B2

公开(公告)日：2011-01-11

申请号：US11971158

申请日：2008-01-08

申请人： Cesare Ronsisvalle ,  Vincenzo Enea

发明人： Cesare Ronsisvalle ,  Vincenzo Enea

IPC分类号： H01L29/10

CPC分类号： H01L29/7803 ,  H01L27/0259 ,  H01L27/0716 ,  H01L29/7302 ,  H01L29/739 ,  H01L29/7808 ,  H01L29/866

摘要： A power actuator of the emitter-switched type is described, the power actuator comprising at least one high voltage bipolar transistor and a low voltage DMOS transistor connected in cascode configuration between a collector terminal of the bipolar transistor and a source terminal of the DMOS transistor and having respective control terminals. Advantageously, the power actuator further comprises at least a Zener diode, inserted between the source terminal of the DMOS transistor and the control transistor of the bipolar transistor.

摘要翻译： 描述了发射极开关型的功率致动器，功率致动器包括至少一个高电压双极晶体管和在双极型晶体管的集电极端子与DMOS晶体管的源极端子之间以级联配置连接的低压DMOS晶体管，以及 具有各自的控制端子。 有利地，功率致动器还包括插入在DMOS晶体管的源极端子和双极晶体管的控制晶体管之间的至少一个齐纳二极管。

公开(公告)号：US20100001783A1

公开(公告)日：2010-01-07

申请号：US12301448

申请日：2006-05-18

申请人： Cesare Ronsisvalle ,  Vincenzo Enea

发明人： Cesare Ronsisvalle ,  Vincenzo Enea

IPC分类号： H03K17/72 ,  H01L29/739

CPC分类号： H01L29/7395 ,  H01L29/742 ,  H01L29/7455

摘要： An embodiment of a power device having a first current-conduction terminal, a second current-conduction terminal, a control terminal receiving, in use, a control voltage of the power device, and a thyristor device and a first insulated-gate switch device connected in series between the first and the second conduction terminals; the first insulated-gate switch device has a gate terminal connected to the control terminal, and the thyristor device has a base terminal. The power device is further provided with: a second insulated-gate switch device, connected between the first current-conduction terminal and the base terminal of the thyristor device, and having a respective gate terminal connected to the control terminal; and a Zener diode, connected between the base terminal of the thyristor device and the second current-conduction terminal so as to enable extraction of current from the base terminal in a given operating condition.

摘要翻译： 具有第一导通端子，第二导通端子，控制端子的功率器件的一个实施例，在使用中接收功率器件的控制电压，以及晶闸管器件和连接到第一绝缘栅极开关器件 串联在第一和第二导电端子之间; 第一绝缘栅极开关器件具有连接到控制端子的栅极端子，并且晶闸管器件具有基极端子。 功率器件还具备：连接在晶闸管器件的第一通电端子和基极端子之间的第二绝缘栅极开关器件，并具有连接到控制端子的相应的栅极端子; 以及齐纳二极管，其连接在晶闸管器件的基极端子与第二导通端子之间，以便能够在给定的工作条件下从基极端子提取电流。

公开(公告)号：US20070090415A1

公开(公告)日：2007-04-26

申请号：US10557766

申请日：2003-05-19

申请人： Cesare Ronsisvalle

发明人： Cesare Ronsisvalle

IPC分类号： H01L29/76

CPC分类号： H01L29/66378 ,  H01L29/7455

摘要： A power device is formed by a thyristor and by a MOSFET transistors, series-connected between a first and a second current-conduction terminal. The power device moreover has a control terminal connected to an insulated-gate electrode of the MOSFET transistor and receiving a control voltage for turning on/off the device, and a third current-conduction terminal connected to the thyristor for fast extraction of charges during turning-off. Thereby, upon turning off, there are no current tails, and turning off is very fast. The power device does not have parasitic components and consequently has a very high reverse-bias safe-operating area.

摘要翻译： 功率器件由晶闸管和串联连接在第一和第二导通端子之间的MOSFET晶体管形成。 此外，功率器件具有连接到MOSFET晶体管的绝缘栅电极的控制端子，并且接收用于接通/关断器件的控制电压，以及连接到晶闸管的第三导通端子，用于在转动期间快速提取电荷 -off。 因此，在关闭时，没有当前尾部，并且关闭非常快。 功率器件没有寄生元件，因此具有非常高的反向偏置安全操作区域。

公开(公告)号：USRE44300E1

公开(公告)日：2013-06-18

申请号：US13549308

申请日：2003-05-19

申请人： Cesare Ronsisvalle

发明人： Cesare Ronsisvalle

IPC分类号： H01L31/113 ,  H01L31/119

CPC分类号： H01L29/66378 ,  H01L29/7455

摘要： A power device is formed by a thyristor and by a MOSFET transistor, series-connected between a first and a second current-conduction terminal. The power device moreover has a control terminal connected to an insulated-gate electrode of the MOSFET transistor and receiving a control voltage for turning on/off the device, and a third current-conduction terminal connected to the thyristor for fast extraction of charges during turning-off. Thereby, upon turning off, there are no current tails, and turning off is very fast. The power device does not have parasitic components and consequently has a very high reverse-bias safe-operating area.

摘要翻译： 功率器件由晶闸管和串联连接在第一和第二导通端之间的MOSFET晶体管形成。 此外，功率器件具有连接到MOSFET晶体管的绝缘栅电极的控制端子，并且接收用于接通/关断器件的控制电压，以及连接到晶闸管的第三导通端子，用于在转动期间快速提取电荷 -off。 因此，在关闭时，没有当前尾部，并且关闭非常快。 功率器件没有寄生元件，因此具有非常高的反向偏置安全操作区域。

公开(公告)号：US5821616A

公开(公告)日：1998-10-13

申请号：US861492

申请日：1997-05-22

申请人： Cesare Ronsisvalle

发明人： Cesare Ronsisvalle

IPC分类号： H01L21/52 ,  H01L23/051 ,  H01L23/48 ,  H01L29/06 ,  H01L29/417 ,  H01L29/78 ,  H01L29/32

CPC分类号： H01L24/72 ,  H01L23/051 ,  H01L29/7802 ,  H01L29/0696 ,  H01L29/41741 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/13033 ,  H01L2924/13034 ,  H01L2924/13055 ,  H01L2924/13091

摘要： A power MOS chip and package assembly is provided for packaging a power MOS chip that has high heat dissipation. The assembly maintains a low contact resistance to the chip using compression without damaging the chip. The package assembly includes a thermally conductive body, a chip, an electrically conductive contact washer and an external electrical terminal. The chip includes a semiconductor substrate layer, an insulating layer, a conductive material gate layer and a metal layer. The layers form a plurality of first regions that are functionally inactive and a plurality of second regions. The insulating layer is formed to be thicker in the first regions than in the second regions so that the metal layer is elevated with respect to the substrate layer by a greater amount in the first regions than in the second regions. The contact washer is placed in mechanical contact with the chip so that it exerts pressure against the metal layer in the first regions to create an electrical connection. The terminal is placed in mechanical and electrical contact with the contact washer.

摘要翻译： 提供功率MOS芯片和封装组件，用于封装具有高散热功率的功率MOS芯片。 组件使用压缩保持对芯片的低接触电阻而不损坏芯片。 封装组件包括导热体，芯片，导电接触垫圈和外部电气端子。 芯片包括半导体衬底层，绝缘层，导电材料栅极层和金属层。 这些层形成功能无效的多个第一区域和多个第二区域。 绝缘层形成为在第一区域中比在第二区域中更厚，使得金属层相对于衬底层在第一区域中比在第二区域中更大量地升高。 接触垫圈与芯片机械接触，使得其在第一区域中对金属层施加压力以产生电连接。 端子与接触垫圈机械和电气接触。

公开(公告)号：US5250821A

公开(公告)日：1993-10-05

申请号：US819362

申请日：1992-01-09

申请人： Giuseppe Ferla ,  Cesare Ronsisvalle ,  Pier E. Zani

发明人： Giuseppe Ferla ,  Cesare Ronsisvalle ,  Pier E. Zani

IPC分类号： H01L25/07 ,  H01L23/051 ,  H01L23/50 ,  H01L23/525 ,  H01L25/18 ,  H01L25/04 ,  H01L23/00

CPC分类号： H01L23/051 ,  H01L23/50 ,  H01L23/5256 ,  H01L2924/0002 ,  H01L2924/13055

摘要： Plural modular elementary semiconductor power components are respectively contained within plural semiconductor chip regions of a same semiconductor slice. A metallic layer covers a first surface of the semiconductor slice and is commonly connected to anode electrodes of the plural elementary power components. Plural space apart quadrangular metallic layer regions respectively cover the plural semiconductor chip regions on a second surface of the semiconductor slice and are respectively connected to cathode electrodes of the plural elementary power components. Plural first metallic tracks are spaced apart from and surround the respective plural metallic layer regions on the second surface of the semiconductor slice. Each respective first metallic track is connected to a control electrode of the elementary power component contained within the semiconductor chip regions surrounded by the respective first metallic track. Plural second metallic tracks extend spaced apart from and between the plural first metallic tracks to form a lattice configuration on the second surface of the semiconductor slice. Plural fuse elements, for selectively isolating defective elementary power components, are located on the second surface of the semiconductor slice and connect the first and second metallic tracks.

公开(公告)号：US5073511A

公开(公告)日：1991-12-17

申请号：US330182

申请日：1989-03-29

申请人： Salvatore Musumeci ,  Cesare Ronsisvalle

发明人： Salvatore Musumeci ,  Cesare Ronsisvalle

IPC分类号： H01L29/68 ,  H01L21/331 ,  H01L29/739 ,  H01L29/78

CPC分类号： H01L29/66333 ,  H01L29/7395 ,  Y10S148/126

摘要： The thin buffer layer, very often present in HIMOS devices, is achieved by ion implantation or predeposition of the dopant followed by subsequent diffusion.

公开(公告)号：US07982528B2

公开(公告)日：2011-07-19

申请号：US12301448

申请日：2006-05-18

申请人： Cesare Ronsisvalle ,  Vincenzo Enea

发明人： Cesare Ronsisvalle ,  Vincenzo Enea

IPC分类号： H03K17/72

CPC分类号： H01L29/7395 ,  H01L29/742 ,  H01L29/7455

摘要： An embodiment of a power device having a first current-conduction terminal, a second current-conduction terminal, a control terminal receiving, in use, a control voltage of the power device, and a thyristor device and a first insulated-gate switch device connected in series between the first and the second conduction terminals; the first insulated-gate switch device has a gate terminal connected to the control terminal, and the thyristor device has a base terminal. The power device is further provided with: a second insulated-gate switch device, connected between the first current-conduction terminal and the base terminal of the thyristor device, and having a respective gate terminal connected to the control terminal; and a Zener diode, connected between the base terminal of the thyristor device and the second current-conduction terminal so as to enable extraction of current from the base terminal in a given operating condition.

摘要翻译： 具有第一导通端子，第二导通端子，控制端子的功率器件的一个实施例，在使用中接收功率器件的控制电压，以及晶闸管器件和连接到第一绝缘栅极开关器件 串联在第一和第二导电端子之间; 第一绝缘栅极开关器件具有连接到控制端子的栅极端子，并且晶闸管器件具有基极端子。 功率器件还具备：连接在晶闸管器件的第一通电端子和基极端子之间的第二绝缘栅极开关器件，并具有连接到控制端子的相应的栅极端子; 以及齐纳二极管，其连接在晶闸管器件的基极端子与第二导通端子之间，以便能够在给定的工作条件下从基极端子提取电流。

公开(公告)号：US07755139B2

公开(公告)日：2010-07-13

申请号：US10557766

申请日：2003-05-19

申请人： Cesare Ronsisvalle

发明人： Cesare Ronsisvalle

IPC分类号： H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

CPC分类号： H01L29/66378 ,  H01L29/7455

摘要： A power device is formed by a thyristor and by a MOSFET transistor, series-connected between a first and a second current-conduction terminal. The power device moreover has a control terminal connected to an insulated-gate electrode of the MOSFET transistor and receiving a control voltage for turning on/off the device, and a third current-conduction terminal connected to the thyristor for fast extraction of charges during turning-off. Thereby, upon turning off, there are no current tails, and turning off is very fast. The power device does not have parasitic components and consequently has a very high reverse-bias safe-operating area.

摘要翻译： 功率器件由晶闸管和串联连接在第一和第二导通端之间的MOSFET晶体管形成。 此外，功率器件具有连接到MOSFET晶体管的绝缘栅电极的控制端子，并且接收用于接通/关断器件的控制电压，以及连接到晶闸管的第三导通端子，用于在转动期间快速提取电荷 -off。 因此，在关闭时，没有当前尾部，并且关闭非常快。 功率器件没有寄生元件，因此具有非常高的反向偏置安全操作区域。