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    Enhancement Mode III-N HEMTs
    4.
    发明申请
    Enhancement Mode III-N HEMTs 有权
    增强模式III-N HEMTs

    公开(公告)号：US20090267078A1

    公开(公告)日：2009-10-29

    申请号：US12108449

    申请日：2008-04-23

    申请人： Umesh Mishra ,  Robert Coffie ,  Likun Shen ,  Ilan Ben-Yaacov ,  Primit Parikh

    发明人： Umesh Mishra ,  Robert Coffie ,  Likun Shen ,  Ilan Ben-Yaacov ,  Primit Parikh

    IPC分类号： H01L29/778 ,  H01L21/338

    CPC分类号： H01L29/7784 ,  H01L21/0217 ,  H01L21/0254 ,  H01L29/0847 ,  H01L29/1033 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/207 ,  H01L29/365 ,  H01L29/4236 ,  H01L29/518 ,  H01L29/66431 ,  H01L29/66462 ,  H01L29/7783 ,  H01L29/7787 ,  H01L29/7788

    摘要： A III-N semiconductor device that includes a substrate and a nitride channel layer including a region partly beneath a gate region, and two channel access regions on opposite sides of the part beneath the gate. The channel access regions may be in a different layer from the region beneath the gate. The device includes an AlXN layer adjacent the channel layer wherein X is gallium, indium or their combination, and a preferably n-doped GaN layer adjacent the AlXN layer in the areas adjacent to the channel access regions. The concentration of Al in the AlXN layer, the AlXN layer thickness and the n-doping concentration in the n-doped GaN layer are selected to induce a 2DEG charge in channel access regions without inducing any substantial 2DEG charge beneath the gate, so that the channel is not conductive in the absence of a switching voltage applied to the gate.

    摘要翻译： 一种III-N半导体器件，其包括衬底和包括部分在栅极区域下方的区域的氮化物沟道层，以及在栅极下方的部分的相对侧上的两个沟道存取区域。 通道接入区域可以在与栅极下方的区域不同的层中。 该器件包括与沟道层相邻的AlXN层，其中X是镓，铟或它们的组合，以及在与沟道接入区相邻的区域中与AlXN层相邻的优选n掺杂GaN层。 选择AlXN层中的Al的浓度，n掺杂GaN层中的AlXN层厚度和n掺杂浓度，以在沟道接入区域中引起2DEG电荷，而不在栅极下方引起任何实质的2DEG电荷，使得 在没有施加到栅极的开关电压的情况下，通道不导通。

    III-nitride devices with recessed gates
    5.
    发明授权
    III-nitride devices with recessed gates 有权
    具有凹入栅极的III族氮化物器件

    公开(公告)号：US07795642B2

    公开(公告)日：2010-09-14

    申请号：US12102340

    申请日：2008-04-14

    申请人： Chang Soo Suh ,  Ilan Ben-Yaacov

    发明人： Chang Soo Suh ,  Ilan Ben-Yaacov

    IPC分类号： H01L31/0328

    CPC分类号： H01L29/7787 ,  H01L29/2003 ,  H01L29/41766 ,  H01L29/42316 ,  H01L29/4236

    摘要： III-nitride devices are described with recessed gates. In some embodiments, the material around the gates is formed by epitaxially depositing different III-nitride layers on a substrate and etching through at least the top two layers in the gate region. Because adjacent layers in the top three layers of the structure have different compositions, some of the layers act as etch stops to allow for precision etching. In some embodiments, a regrowth mask is used to prevent growth of material in the gate region. A gate electrode is deposited in the recess.

    摘要翻译： III型氮化物器件用凹入栅极描述。 在一些实施例中，围绕栅极的材料通过在衬底上外延沉积不同的III族氮化物层并且蚀刻至少栅极区域中的顶部两层来形成。 因为结构的顶部三层中的相邻层具有不同的组成，所以一些层用作蚀刻停止以允许精密蚀刻。 在一些实施例中，再生长掩模用于防止栅极区域中材料的生长。 栅电极沉积在凹槽中。

    III-Nitride devices with recessed gates
    6.
    发明授权
    III-Nitride devices with recessed gates 有权
    具有凹槽的III型氮化物器件

    公开(公告)号：US07939391B2

    公开(公告)日：2011-05-10

    申请号：US12816971

    申请日：2010-06-16

    申请人： Chang Soo Suh ,  Ilan Ben-Yaacov

    发明人： Chang Soo Suh ,  Ilan Ben-Yaacov

    IPC分类号： H01L21/338

    CPC分类号： H01L29/7787 ,  H01L29/2003 ,  H01L29/41766 ,  H01L29/42316 ,  H01L29/4236

    摘要： III-nitride devices are described with recessed gates. In some embodiments, the material around the gates is formed by epitaxially depositing different III-nitride layers on a substrate and etching through at least the top two layers in the gate region. Because adjacent layers in the top three layers of the structure have different compositions, some of the layers act as etch stops to allow for precision etching. In some embodiments, a regrowth mask is used to prevent growth of material in the gate region. A gate electrode is deposited in the recess.

    摘要翻译： III型氮化物器件用凹入栅极描述。 在一些实施例中，围绕栅极的材料通过在衬底上外延沉积不同的III族氮化物层并且蚀刻至少栅极区域中的顶部两层来形成。 因为结构的顶部三层中的相邻层具有不同的组成，所以一些层用作蚀刻停止以允许精密蚀刻。 在一些实施例中，再生长掩模用于防止栅极区域中材料的生长。 栅电极沉积在凹槽中。

    III-Nitride Devices with Recessed Gates
    7.
    发明申请
    III-Nitride Devices with Recessed Gates 有权
    具有嵌入式门的III型氮化物器件

    公开(公告)号：US20090072240A1

    公开(公告)日：2009-03-19

    申请号：US12102340

    申请日：2008-04-14

    申请人： Chang Soo Suh ,  Ilan Ben-Yaacov

    发明人： Chang Soo Suh ,  Ilan Ben-Yaacov

    IPC分类号： H01L29/778 ,  H01L21/338

    CPC分类号： H01L29/7787 ,  H01L29/2003 ,  H01L29/41766 ,  H01L29/42316 ,  H01L29/4236

    摘要： III-nitride devices are described with recessed gates. In some embodiments, the material around the gates is formed by epitaxially depositing different III-nitride layers on a substrate and etching through at least the top two layers in the gate region. Because adjacent layers in the top three layers of the structure have different compositions, some of the layers act as etch stops to allow for precision etching. In some embodiments, a regrowth mask is used to prevent growth of material in the gate region. A gate electrode is deposited in the recess.

    摘要翻译： III型氮化物器件用凹入栅极描述。 在一些实施例中，围绕栅极的材料通过在衬底上外延沉积不同的III族氮化物层并且蚀刻至少栅极区域中的顶部两层来形成。 因为结构的顶部三层中的相邻层具有不同的组成，所以一些层用作蚀刻停止以允许精密蚀刻。 在一些实施例中，再生长掩模用于防止栅极区域中材料的生长。 栅电极沉积在凹槽中。

    III-NITRIDE DEVICES WITH RECESSED GATES
    8.
    发明申请
    III-NITRIDE DEVICES WITH RECESSED GATES 有权
    具有接收器门的III-NITRIDE器件

    公开(公告)号：US20100255646A1

    公开(公告)日：2010-10-07

    申请号：US12816971

    申请日：2010-06-16

    申请人： Chang Soo Suh ,  Ilan Ben-Yaacov

    发明人： Chang Soo Suh ,  Ilan Ben-Yaacov

    IPC分类号： H01L21/335

    CPC分类号： H01L29/7787 ,  H01L29/2003 ,  H01L29/41766 ,  H01L29/42316 ,  H01L29/4236

    摘要： III-nitride devices are described with recessed gates. In some embodiments, the material around the gates is formed by epitaxially depositing different III-nitride layers on a substrate and etching through at least the top two layers in the gate region. Because adjacent layers in the top three layers of the structure have different compositions, some of the layers act as etch stops to allow for precision etching. In some embodiments, a regrowth mask is used to prevent growth of material in the gate region. A gate electrode is deposited in the recess.

    摘要翻译： III型氮化物器件用凹入栅极描述。 在一些实施例中，围绕栅极的材料通过在衬底上外延沉积不同的III族氮化物层并且蚀刻至少栅极区域中的顶部两层来形成。 因为结构的顶部三层中的相邻层具有不同的组成，所以一些层用作蚀刻停止以允许精密蚀刻。 在一些实施例中，再生长掩模用于防止栅极区域中材料的生长。 栅电极沉积在凹槽中。

    SEMICONDUCTOR DEVICES WITH INTEGRATED HOLE COLLECTORS
    10.
    发明申请
    SEMICONDUCTOR DEVICES WITH INTEGRATED HOLE COLLECTORS 有权
    具有集成孔收集器的半导体器件

    公开(公告)号：US20140001557A1

    公开(公告)日：2014-01-02

    申请号：US13535094

    申请日：2012-06-27

    申请人： Umesh Mishra ,  Srabanti Chowdhury ,  Ilan Ben-Yaacov

    发明人： Umesh Mishra ,  Srabanti Chowdhury ,  Ilan Ben-Yaacov

    IPC分类号： H01L29/772 ,  H01L21/336

    CPC分类号： H01L29/402 ,  H01L29/0619 ,  H01L29/2003 ,  H01L29/207 ,  H01L29/42316 ,  H01L29/4236 ,  H01L29/42376 ,  H01L29/7786 ,  H01L29/78

    摘要： Transistor devices which include semiconductor layers with integrated hole collector regions are described. The hole collector regions are configured to collect holes generated in the transistor device during operation and transport them away from the active regions of the device. The hole collector regions can be electrically connected or coupled to the source, the drain, or a field plate of the device. The hole collector regions can be doped, for example p-type or nominally p-type, and can be capable of conducting holes but not electrons.

    摘要翻译： 描述了包括具有集成的空穴集电区域的半导体层的晶体管器件。 空穴集电极区域被配置为在操作期间收集在晶体管器件中产生的空穴并且将它们远离器件的有源区域传送。 空穴集电极区域可以电连接或耦合到器件的源极，漏极或场板。 空穴集电极区域可以被掺杂，例如p型或名义上的p型，并且能够导通空穴而不是电子。