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    Composite passivation process for nitride FET
    2.
    发明授权
    Composite passivation process for nitride FET 有权
    氮化物FET的复合钝化工艺

    公开(公告)号：US08431962B2

    公开(公告)日：2013-04-30

    申请号：US11952527

    申请日：2007-12-07

    申请人： Benjamin Heying ,  Ioulia Smorchkova ,  Vincent Gambin ,  Robert Coffie

    发明人： Benjamin Heying ,  Ioulia Smorchkova ,  Vincent Gambin ,  Robert Coffie

    IPC分类号： H01L29/66

    CPC分类号： H01L29/78 ,  H01L23/3171 ,  H01L29/2003 ,  H01L29/452 ,  H01L29/513 ,  H01L29/66568 ,  H01L29/7787 ,  H01L2924/0002 ,  H01L2924/13063 ,  H01L2924/13091 ,  H01L2924/00

    摘要： A nitride-based FET device that provides reduced electron trapping and gate current leakage. The device includes a relatively thick passivation layer to reduce traps caused by device processing and a thin passivation layer below the gate terminal to reduce gate current leakage. The device includes semiconductor device layers deposited on a substrate. A plurality of passivation layers are deposited on the semiconductor device layers, where at least two of the layers are made of a different dielectric material to provide an etch stop. One or more of the passivation layers can be removed using the interfaces between the layers as an etch stop so that the distance between the gate terminal and the semiconductor device layers can be tightly controlled, where the distance can be made very thin to increase device performance and reduce gate current leakage.

    摘要翻译： 提供减少的电子俘获和栅极电流泄漏的基于氮化物的FET器件。 该器件包括相对较厚的钝化层，以减少由器件处理引起的陷阱和栅极端子下方的薄钝化层，以减少栅极电流泄漏。 该器件包括沉积在衬底上的半导体器件层。 多个钝化层沉积在半导体器件层上，其中至少两个层由不同的介电材料制成以提供蚀刻停止。 可以使用层之间的界面作为蚀刻停止来去除一个或多个钝化层，使得可以严格控制栅极端子和半导体器件层之间的距离，其中可以使距离变得非常薄以增加器件性能 并减少栅极电流泄漏。

    CLUB EXTENSION TO A T-GATE HIGH ELECTRON MOBILITY TRANSISTOR
    3.
    发明申请
    CLUB EXTENSION TO A T-GATE HIGH ELECTRON MOBILITY TRANSISTOR 有权
    CLUB扩展到T型高电子移动晶体管

    公开(公告)号：US20090267115A1

    公开(公告)日：2009-10-29

    申请号：US12150417

    申请日：2008-04-28

    申请人： Carol Osaka Namba ,  Po-Hsin Liu ,  Ioulia Smorchkova ,  Michael Wojtowicz ,  Robert Coffie ,  Yaochung Chen

    发明人： Carol Osaka Namba ,  Po-Hsin Liu ,  Ioulia Smorchkova ,  Michael Wojtowicz ,  Robert Coffie ,  Yaochung Chen

    IPC分类号： H01L29/778 ,  H01L21/338

    CPC分类号： H01L29/42316 ,  H01L21/0272 ,  H01L21/0277 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/66462 ,  H01L29/7786

    摘要： A method of fabricating a T-gate HEMT with a club extension comprising the steps of: providing a substrate; providing a bi-layer resist on the substrate; exposing an area of the bi-layer resist to electron beam lithography where the area corresponds to a T-gate opening; exposing an area of the bi-layer resist to electron beam lithography where the area corresponds to the shape of the club extension wherein the area corresponding to the club extension is approximately 1 micron to an ohmic source side of a T-gate and approximately 0.5 microns forward from a front of the T-gate; developing out the bi-layer resist in the exposed area that corresponds to the T-gate opening; developing out the bi-layer resist in the exposed area that corresponds to the club extension; and forming the T-gate and club extension through a metallization process.

    摘要翻译： 一种制造具有球杆延伸部的T形门HEMT的方法，包括以下步骤：提供衬底; 在基板上提供双层抗蚀剂; 将双层抗蚀剂的区域暴露于电子束光刻，其中该区域对应于T形栅极开口; 将双层抗蚀剂的区域暴露于电子束光刻，其中该区域对应于球杆延伸部的形状，其中对应于球杆延伸部分的区域对于T形闸门的欧姆源侧为约1微米，大约为0.5微米 从T型门前方前进; 在对应于T型门开口的暴露区域中形成双层抗蚀剂; 在对应于俱乐部延伸的暴露区域中开发双层抗蚀剂; 以及通过金属化工艺形成T形门和球杆延伸。

    Enhancement Mode III-N HEMTs
    9.
    发明申请
    Enhancement Mode III-N HEMTs 有权
    增强模式III-N HEMTs

    公开(公告)号：US20090267078A1

    公开(公告)日：2009-10-29

    申请号：US12108449

    申请日：2008-04-23

    申请人： Umesh Mishra ,  Robert Coffie ,  Likun Shen ,  Ilan Ben-Yaacov ,  Primit Parikh

    发明人： Umesh Mishra ,  Robert Coffie ,  Likun Shen ,  Ilan Ben-Yaacov ,  Primit Parikh

    IPC分类号： H01L29/778 ,  H01L21/338

    CPC分类号： H01L29/7784 ,  H01L21/0217 ,  H01L21/0254 ,  H01L29/0847 ,  H01L29/1033 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/207 ,  H01L29/365 ,  H01L29/4236 ,  H01L29/518 ,  H01L29/66431 ,  H01L29/66462 ,  H01L29/7783 ,  H01L29/7787 ,  H01L29/7788

    摘要： A III-N semiconductor device that includes a substrate and a nitride channel layer including a region partly beneath a gate region, and two channel access regions on opposite sides of the part beneath the gate. The channel access regions may be in a different layer from the region beneath the gate. The device includes an AlXN layer adjacent the channel layer wherein X is gallium, indium or their combination, and a preferably n-doped GaN layer adjacent the AlXN layer in the areas adjacent to the channel access regions. The concentration of Al in the AlXN layer, the AlXN layer thickness and the n-doping concentration in the n-doped GaN layer are selected to induce a 2DEG charge in channel access regions without inducing any substantial 2DEG charge beneath the gate, so that the channel is not conductive in the absence of a switching voltage applied to the gate.

    摘要翻译： 一种III-N半导体器件，其包括衬底和包括部分在栅极区域下方的区域的氮化物沟道层，以及在栅极下方的部分的相对侧上的两个沟道存取区域。 通道接入区域可以在与栅极下方的区域不同的层中。 该器件包括与沟道层相邻的AlXN层，其中X是镓，铟或它们的组合，以及在与沟道接入区相邻的区域中与AlXN层相邻的优选n掺杂GaN层。 选择AlXN层中的Al的浓度，n掺杂GaN层中的AlXN层厚度和n掺杂浓度，以在沟道接入区域中引起2DEG电荷，而不在栅极下方引起任何实质的2DEG电荷，使得 在没有施加到栅极的开关电压的情况下，通道不导通。