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    Multiple level cell phase-change memory devices having post-programming operation resistance drift saturation, memory systems employing such devices and methods of reading memory devices
    1.
    发明授权
    Multiple level cell phase-change memory devices having post-programming operation resistance drift saturation, memory systems employing such devices and methods of reading memory devices 有权
    具有后编程操作电阻漂移饱和的多电平单元相变存储器件，采用这种器件的存储器系统以及读取存储器件的方法

    公开(公告)号：US07778079B2

    公开(公告)日：2010-08-17

    申请号：US12079892

    申请日：2008-03-28

    申请人： Chang-Wook Jeong ,  Dae-Hwan Kang ,  Hyeong-Jun Kim ,  Jae-Min Shin ,  Seung-Pil Ko

    发明人： Chang-Wook Jeong ,  Dae-Hwan Kang ,  Hyeong-Jun Kim ,  Jae-Min Shin ,  Seung-Pil Ko

    IPC分类号： G11C16/06

    CPC分类号： G11C11/5678 ,  G11C8/08 ,  G11C13/0004 ,  G11C13/0028 ,  G11C13/0038 ,  G11C13/0061 ,  G11C13/0069 ,  G11C2013/0078

    摘要： In a memory device and in a method of programming the same, a memory device comprises: a plurality of memory cells, each memory cell comprising a resistance-changeable material that has an initial resistance that is determined in response to an applied programming current in a programming operation; and a modification circuit that modifies the resistance of the memory cell following a programming operation of the memory cell to vary the resistance of the memory cell from the initial resistance to a second resistance by applying a saturation current in a saturation operation. Each memory cell is connected to a conduction line of the memory device that is used to apply the programming current to program the resistance of the corresponding memory cell in the programming operation, that is used to apply the saturation current to the corresponding memory cell in the saturation operation and that is used to apply a read current to read the resistance of the corresponding memory cell in a subsequent read operation.

    摘要翻译： 在存储器件和其编程方法中，存储器件包括：多个存储器单元，每个存储器单元包括电阻可变材料，该电阻可变材料具有响应于在一个应用编程电流中确定的初始电阻 编程操作; 以及修改电路，其在存储单元的编程操作之后修改存储单元的电阻，以通过在饱和运算中施加饱和电流来将存储单元的电阻从初始电阻改变为第二电阻。 每个存储单元连接到存储器件的导线，该导线用于施加编程电流以对编程操作中对应的存储单元的电阻进行编程，用于将饱和电流施加到相应的存储单元中 饱和操作，并且用于在随后的读取操作中应用读取电流来读取相应存储器单元的电阻。

    Multiple level cell phase-change memory devices having post-programming operation resistance drift saturation, memory systems employing such devices and methods of reading memory devices
    2.
    发明申请
    Multiple level cell phase-change memory devices having post-programming operation resistance drift saturation, memory systems employing such devices and methods of reading memory devices 有权
    具有后编程操作电阻漂移饱和的多电平单元相变存储器件，采用这种器件的存储器系统以及读取存储器件的方法

    公开(公告)号：US20090016099A1

    公开(公告)日：2009-01-15

    申请号：US12079892

    申请日：2008-03-28

    申请人： Chang-Wook Jeong ,  Dae-Hwan Kang ,  Hyeong-Jun Kim ,  Jae-Min Shin ,  Seung-Pil Ko

    发明人： Chang-Wook Jeong ,  Dae-Hwan Kang ,  Hyeong-Jun Kim ,  Jae-Min Shin ,  Seung-Pil Ko

    IPC分类号： G11C11/00 ,  G11C7/00

    CPC分类号： G11C11/5678 ,  G11C8/08 ,  G11C13/0004 ,  G11C13/0028 ,  G11C13/0038 ,  G11C13/0061 ,  G11C13/0069 ,  G11C2013/0078

    摘要： In a memory device and in a method of programming the same, a memory device comprises: a plurality of memory cells, each memory cell comprising a resistance-changeable material that has an initial resistance that is determined in response to an applied programming current in a programming operation; and a modification circuit that modifies the resistance of the memory cell following a programming operation of the memory cell to vary the resistance of the memory cell from the initial resistance to a second resistance by applying a saturation current in a saturation operation. Each memory cell is connected to a conduction line of the memory device that is used to apply the programming current to program the resistance of the corresponding memory cell in the programming operation, that is used to apply the saturation current to the corresponding memory cell in the saturation operation and that is used to apply a read current to read the resistance of the corresponding memory cell in a subsequent read operation.

    摘要翻译： 在存储器件和其编程方法中，存储器件包括：多个存储器单元，每个存储器单元包括电阻可变材料，该电阻可变材料具有响应于在一个应用编程电流中确定的初始电阻 编程操作; 以及修改电路，其在存储单元的编程操作之后修改存储单元的电阻，以通过在饱和运算中施加饱和电流来将存储单元的电阻从初始电阻改变为第二电阻。 每个存储单元连接到存储器件的导线，该导线用于施加编程电流以对编程操作中对应的存储单元的电阻进行编程，用于将饱和电流施加到相应的存储单元中 饱和操作，并且用于在随后的读取操作中应用读取电流来读取相应存储器单元的电阻。

    Multiple level cell phase-change memory devices having controlled resistance drift parameter, memory systems employing such devices and methods of reading memory devices
    4.
    发明申请
    Multiple level cell phase-change memory devices having controlled resistance drift parameter, memory systems employing such devices and methods of reading memory devices 有权
    具有受控电阻漂移参数的多电平单元相变存储器件，采用这种器件的存储器系统以及读取存储器件的方法

    公开(公告)号：US20080316804A1

    公开(公告)日：2008-12-25

    申请号：US12079886

    申请日：2008-03-28

    申请人： Chang-Wook Jeong ,  Dae-Hwan Kang ,  Hyeong-Jun Kim ,  Seung-Pil Ko ,  Dong-Won Lim

    发明人： Chang-Wook Jeong ,  Dae-Hwan Kang ,  Hyeong-Jun Kim ,  Seung-Pil Ko ,  Dong-Won Lim

    IPC分类号： G11C11/00

    CPC分类号： G11C11/5678 ,  G11C11/56 ,  G11C13/0004 ,  G11C13/0033 ,  G11C16/3427

    摘要： In a method of controlling resistance drift in a memory cell of a resistance-changeable material memory device, the resistance changeable material in the memory cell is treated so that a drift parameter for the memory cell is less than about 0.18, wherein a change in resistance of a memory cell over the time period is determined according to the relationship: Rdrift=Rinitial×tα; where Rdrift represents a final resistance of the memory cell following the time period, Rinitial represents the initial resistance of the memory cell following the programming operation, t represents the time period; and α represents the drift parameter.

    摘要翻译： 在电阻可变材料存储装置的存储单元中控制电阻漂移的方法中，对存储单元中的电阻变化材料进行处理，使得存储单元的漂移参数小于约0.18，其中电阻变化 根据以下关系确定该时间段内的存储单元：<？in-line-formula description =“In-line Formulas”end =“lead”？> Rdrift = Rinitialxtalpha; <？in-line-formula description = “In-Line Formulas”end =“tail”？>其中Rdrift表示在时间段之后的存储单元的最终电阻，Rinitial表示编程操作之后的存储单元的初始电阻，t表示时间段; 而alpha表示漂移参数。

    Multiple level cell phase-change memory device having pre-reading operation resistance drift recovery, memory systems employing such devices and methods of reading memory devices
    5.
    发明申请
    Multiple level cell phase-change memory device having pre-reading operation resistance drift recovery, memory systems employing such devices and methods of reading memory devices 有权
    具有预读取操作电阻漂移恢复的多电平单元相变存储器件，采用这种器件的存储器系统以及读取存储器件的方法

    公开(公告)号：US20080266942A1

    公开(公告)日：2008-10-30

    申请号：US12079869

    申请日：2008-03-28

    申请人： Chang-Wook Jeong ,  Gi-Tae Jeong ,  Hyeong-Jun Kim ,  Seung-Pil Ko

    发明人： Chang-Wook Jeong ,  Gi-Tae Jeong ,  Hyeong-Jun Kim ,  Seung-Pil Ko

    IPC分类号： G11C11/00 ,  G11C7/00

    CPC分类号： G11C11/56 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/004 ,  G11C13/0069 ,  G11C2013/0078 ,  Y10S977/754

    摘要： A memory device comprises a plurality of memory cells, each memory cell comprising a memory cell material that has an initial resistance that is determined in response to an applied programming current in a programming operation, the resistance of the memory cell varying from the initial resistance over a time period following the programming operation, and each memory cell being connected to a conduction line of the memory device that is used to apply the programming current to program the resistance of the corresponding memory cell in the programming operation and that is used to apply a read current to read the resistance of the corresponding memory cell in a read operation. A modification circuit modifies the resistance of a memory cell of the plurality of memory cells selected for a read operation to return its resistance to near the initial resistance prior to a read operation of the memory cell.

    摘要翻译： 存储器件包括多个存储器单元，每个存储器单元包括存储单元材料，该存储单元材料具有响应于编程操作中所施加的编程电流而确定的初始电阻，存储单元的电阻从初始电阻变化 编程操作之后的时间段，并且每个存储器单元连接到存储器件的传导线，其用于在编程操作中应用编程电流来对相应的存储器单元的电阻进行编程，并且用于应用编程 读取电流以读取读取操作中的相应存储单元的电阻。 修改电路修改为读取操作选择的多个存储单元的存储单元的电阻，以在存储单元的读取操作之前将其电阻返回到接近初始电阻。

    Multiple level cell phase-change memory device having pre-reading operation resistance drift recovery, memory systems employing such devices and methods of reading memory devices
    6.
    发明授权
    Multiple level cell phase-change memory device having pre-reading operation resistance drift recovery, memory systems employing such devices and methods of reading memory devices 有权
    具有预读取操作电阻漂移恢复的多电平单元相变存储器件，采用这种器件的存储器系统以及读取存储器件的方法

    公开(公告)号：US07940552B2

    公开(公告)日：2011-05-10

    申请号：US12079869

    申请日：2008-03-28

    申请人： Jeong Chang-Wook ,  Gi-Tae Jeong ,  Hyeong-Jun Kim ,  Seung-Pil Ko

    发明人： Jeong Chang-Wook ,  Gi-Tae Jeong ,  Hyeong-Jun Kim ,  Seung-Pil Ko

    IPC分类号： G11C11/00

    CPC分类号： G11C11/56 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/004 ,  G11C13/0069 ,  G11C2013/0078 ,  Y10S977/754

    摘要： A memory device comprises a plurality of memory cells, each memory cell comprising a memory cell material that has an initial resistance that is determined in response to an applied programming current in a programming operation, the resistance of the memory cell varying from the initial resistance over a time period following the programming operation, and each memory cell being connected to a conduction line of the memory device that is used to apply the programming current to program the resistance of the corresponding memory cell in the programming operation and that is used to apply a read current to read the resistance of the corresponding memory cell in a read operation. A modification circuit modifies the resistance of a memory cell of the plurality of memory cells selected for a read operation to return its resistance to near the initial resistance prior to a read operation of the memory cell.

    摘要翻译： 存储器件包括多个存储器单元，每个存储器单元包括存储单元材料，该存储单元材料具有响应于编程操作中所施加的编程电流而确定的初始电阻，存储单元的电阻从初始电阻变化 编程操作之后的时间段，并且每个存储器单元连接到存储器件的传导线，其用于在编程操作中应用编程电流来对相应的存储器单元的电阻进行编程，并且用于应用编程 读取电流以读取读取操作中的相应存储单元的电阻。 修改电路修改为读取操作选择的多个存储单元的存储单元的电阻，以在存储单元的读取操作之前将其电阻返回到接近初始电阻。

    MULTIPLE LEVEL CELL PHASE-CHANGE MEMORY DEVICES HAVING PRE-READING OPERATION RESISTANCE DRIFT RECOVERY, MEMORY SYSTEMS EMPLOYING SUCH DEVICES AND METHODS OF READING MEMORY DEVICES
    7.
    发明申请
    MULTIPLE LEVEL CELL PHASE-CHANGE MEMORY DEVICES HAVING PRE-READING OPERATION RESISTANCE DRIFT RECOVERY, MEMORY SYSTEMS EMPLOYING SUCH DEVICES AND METHODS OF READING MEMORY DEVICES 有权
    具有预读操作电阻恢复的多级电平相变存储器件，使用这种器件的存储器系统和读存储器件的方法

    公开(公告)号：US20110188304A1

    公开(公告)日：2011-08-04

    申请号：US13084906

    申请日：2011-04-12

    申请人： Jeong Chang-Wook ,  Gi-Tae Jeong ,  Hyeong-Jun Kim ,  Seung-Pil Ko

    发明人： Jeong Chang-Wook ,  Gi-Tae Jeong ,  Hyeong-Jun Kim ,  Seung-Pil Ko

    IPC分类号： G11C11/00

    CPC分类号： G11C11/56 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/004 ,  G11C13/0069 ,  G11C2013/0078 ,  Y10S977/754

    摘要： A memory device comprises a plurality of memory cells, each memory cell comprising a memory cell material that has an initial resistance that is determined in response to an applied programming current in a programming operation, the resistance of the memory cell varying from the initial resistance over a time period following the programming operation, and each memory cell being connected to a conduction line of the memory device that is used to apply the programming current to program the resistance of the corresponding memory cell in the programming operation and that is used to apply a read current to read the resistance of the corresponding memory cell in a read operation. A modification circuit modifies the resistance of a memory cell of the plurality of memory cells selected for a read operation to return its resistance to near the initial resistance prior to a read operation of the memory cell.

    摘要翻译： 存储器件包括多个存储器单元，每个存储器单元包括存储单元材料，该存储单元材料具有响应于编程操作中所施加的编程电流而确定的初始电阻，存储单元的电阻从初始电阻变化 编程操作之后的时间段，并且每个存储器单元连接到存储器件的传导线，其用于在编程操作中应用编程电流来对相应的存储器单元的电阻进行编程，并且用于应用编程 读取电流以读取读取操作中的相应存储单元的电阻。 修改电路修改为读取操作选择的多个存储单元的存储单元的电阻，以在存储单元的读取操作之前将其电阻返回到接近初始电阻。

    Multiple level cell phase-change memory devices having pre-reading operation resistance drift recovery, memory systems employing such devices and methods of reading memory devices
    8.
    发明授权
    Multiple level cell phase-change memory devices having pre-reading operation resistance drift recovery, memory systems employing such devices and methods of reading memory devices 有权
    具有预读操作电阻漂移恢复的多电平单元相变存储器件，采用这种器件的存储器系统以及读取存储器件的方法

    公开(公告)号：US08199567B2

    公开(公告)日：2012-06-12

    申请号：US13084906

    申请日：2011-04-12

    申请人： Jeong Chang-Wook ,  Gi-Tae Jeong ,  Hyeong-Jun Kim ,  Seung-Pil Ko

    发明人： Jeong Chang-Wook ,  Gi-Tae Jeong ,  Hyeong-Jun Kim ,  Seung-Pil Ko

    IPC分类号： G11C11/00

    CPC分类号： G11C11/56 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/004 ,  G11C13/0069 ,  G11C2013/0078 ,  Y10S977/754

    摘要： A memory device comprises a plurality of memory cells, each memory cell comprising a memory cell material that has an initial resistance that is determined in response to an applied programming current in a programming operation, the resistance of the memory cell varying from the initial resistance over a time period following the programming operation, and each memory cell being connected to a conduction line of the memory device that is used to apply the programming current to program the resistance of the corresponding memory cell in the programming operation and that is used to apply a read current to read the resistance of the corresponding memory cell in a read operation. A modification circuit modifies the resistance of a memory cell of the plurality of memory cells selected for a read operation to return its resistance to near the initial resistance prior to a read operation of the memory cell.

    摘要翻译： 存储器件包括多个存储器单元，每个存储器单元包括存储单元材料，该存储单元材料具有响应于编程操作中所施加的编程电流而确定的初始电阻，存储单元的电阻从初始电阻变化 编程操作之后的时间段，并且每个存储器单元连接到存储器件的传导线，其用于在编程操作中应用编程电流来对相应的存储器单元的电阻进行编程，并且用于应用编程 读取电流以读取读取操作中的相应存储单元的电阻。 修改电路修改为读取操作选择的多个存储单元的存储单元的电阻，以在存储单元的读取操作之前将其电阻返回到接近初始电阻。

    Method of forming a contact and method of manufacturing a phase change memory device using the same
    9.
    发明授权
    Method of forming a contact and method of manufacturing a phase change memory device using the same 有权
    形成触点的方法和使用该触点的相变存储器件的制造方法

    公开(公告)号：US08772096B2

    公开(公告)日：2014-07-08

    申请号：US13613277

    申请日：2012-09-13

    申请人： Seung-Pil Ko ,  Eun-Jung Kim ,  Yong-Jun Kim

    发明人： Seung-Pil Ko ,  Eun-Jung Kim ,  Yong-Jun Kim

    IPC分类号： H01L21/338 ,  H01L21/8238 ,  H01L21/336

    CPC分类号： H01L45/06 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/1233 ,  H01L45/143 ,  H01L45/144 ,  H01L45/148 ,  H01L45/16 ,  H01L45/1675

    摘要： Provided are a method of forming a contact and a method of manufacturing a phase change memory device using the same. The method of forming a contact includes forming on a substrate an insulating layer pattern having first sidewalls extending in a first direction and second sidewalls extending in a second direction perpendicular to the first direction and which together delimit contact holes, forming semiconductor patterns in lower parts of the contact holes, forming isolation spacers on the semiconductor pattern and side surfaces of the first sidewalls to expose portions of the semiconductor patterns, and etching the exposed portions of the semiconductor patterns using the isolation spacers as a mask to divide the semiconductor patterns into a plurality of finer semiconductor patterns.

    摘要翻译： 提供一种形成接触的方法和使用其形成相变存储器件的方法。 形成接触的方法包括在基板上形成具有沿第一方向延伸的第一侧壁的绝缘层图案和沿垂直于第一方向的第二方向延伸的第二侧壁，并且一起界定接触孔，在下部形成半导体图案 接触孔，在半导体图案和第一侧壁的侧表面上形成隔离间隔物以暴露半导体图案的部分，并且使用隔离间隔件作为掩模蚀刻半导体图案的暴露部分，以将半导体图案划分为多个 更精细的半导体图案。

    Magnetoresistive random access memory devices and methods of manufacturing the same
    10.
    发明授权
    Magnetoresistive random access memory devices and methods of manufacturing the same 有权
    磁阻随机存取存储器件及其制造方法

    公开(公告)号：US09543357B2

    公开(公告)日：2017-01-10

    申请号：US14804321

    申请日：2015-07-20

    申请人： Seung-Pil Ko ,  Myoung-Su Son ,  Kil-Ho Lee

    发明人： Seung-Pil Ko ,  Myoung-Su Son ,  Kil-Ho Lee

    IPC分类号： H01L27/22 ,  H01L43/08 ,  H01L43/02 ,  H01L43/12

    CPC分类号： H01L27/222 ,  H01L27/228 ,  H01L43/02 ,  H01L43/08 ,  H01L43/12

    摘要： An MRAM device comprises an insulating interlayer comprising a flat first upper surface on a first region and a second region of a substrate. A pattern structure comprising pillar-shaped magnetic tunnel junction (MTJ) structures and a filling layer pattern between the MTJ structures is formed on the insulating interlayer of the first region. The pattern structure comprises a flat second upper surface that is higher than the first upper surface. Bit lines are formed on the pattern structure that contact top surfaces of the MTJ structures. An etch-stop layer is formed on the pattern structure between the bit lines of the first region and the first upper surface of the first insulating interlayer of the second region. A first portion of an upper surface of the etch-stop layer on the first region is higher than a second portion of the upper surface of the etch-stop layer on the second region.

    摘要翻译： MRAM器件包括绝缘中间层，其包括在第一区域上的平坦的第一上表面和衬底的第二区域。 在第一区域的绝缘中间层上形成包括柱形磁隧道结（MTJ）结构和MTJ结构之间的填充层图案的图案结构。 图案结构包括比第一上表面高的扁平的第二上表面。 位线形成在与MTJ结构的顶表面接触的图案结构上。 在第一区域的位线和第二区域的第一绝缘中间层的第一上表面之间的图案结构上形成蚀刻停止层。 第一区域上的蚀刻停止层的上表面的第一部分高于第二区域上的蚀刻停止层的上表面的第二部分。