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    Novel seed layer for fabricating spin valve heads for ultra-high density recordings
    2.
    发明申请
    Novel seed layer for fabricating spin valve heads for ultra-high density recordings 有权
    用于制造用于超高密度记录的自旋阀头的新型种子层

    公开(公告)号：US20070223151A1

    公开(公告)日：2007-09-27

    申请号：US11804241

    申请日：2007-05-17

    申请人： Cheng Horng ,  Hui-Chuan Wang ,  Ru-Ying Tong ,  Chyu-Jiuh Torng

    发明人： Cheng Horng ,  Hui-Chuan Wang ,  Ru-Ying Tong ,  Chyu-Jiuh Torng

    IPC分类号： G11B5/127

    CPC分类号： B82Y10/00 ,  G11B5/3906 ,  Y10T29/49032 ,  Y10T29/49034 ,  Y10T29/49037 ,  Y10T29/49044 ,  Y10T428/1121 ,  Y10T428/115 ,  Y10T428/12778

    摘要： A method for forming a bottom spin valve sensor element with a novel seed layer and synthetic antiferromagnetic pinned layer and the sensor so formed. The novel seed layer comprises an approximately 30 angstrom thick layer of NiCr whose atomic percent of Cr is 31%. On this seed layer there can be formed either a single bottom spin valve read sensor or a symmetric dual spin valve read sensor having synthetic antiferromagnetic pinned layers. An extremely thin (approximately 80 angstroms) MnPt pinning layer can be formed directly on the seed layer and extremely thin pinned and free layers can then subsequently be formed so that the sensors can be used to read recorded media with densities exceeding 60 Gb/in2. Moreover, the high pinning field and optimum magnetostriction produces an extremely robust sensor.

    摘要翻译： 一种用于形成具有新型种子层和合成反铁磁钉扎层的底部自旋阀传感器元件的方法，以及如此形成的传感器。 该新型种子层包含约30埃厚的CrCr原子百分比为31％的NiCr层。 在该种子层上，可以形成单个底部自旋阀读取传感器或具有合成反铁磁固定层的对称双自旋阀读取传感器。 可以在种子层上直接形成非常薄的（约80埃）MnPt钉扎层，然后可以随后形成极薄的钉扎和自由层，使得传感器可用于读取密度超过60Gb / in的记录介质， SUP> 2 。 此外，高钉扎场和最佳磁致伸缩产生极其鲁棒的传感器。

    Bottom conductor for integrated MRAM
    4.
    发明授权
    Bottom conductor for integrated MRAM 有权
    集成MRAM的底部导体

    公开(公告)号：US07358100B2

    公开(公告)日：2008-04-15

    申请号：US11891923

    申请日：2007-08-14

    申请人： Wei Cao ,  Chyu-Jiuh Torng ,  Cheng Horng ,  Ruying Tong ,  Chen-Jung Chien ,  Liubo Hong

    发明人： Wei Cao ,  Chyu-Jiuh Torng ,  Cheng Horng ,  Ruying Tong ,  Chen-Jung Chien ,  Liubo Hong

    IPC分类号： H01L21/00

    CPC分类号： H01L43/12 ,  H01L27/228

    摘要： A method to fabricate an MTJ device and its connections to a CMOS integrated circuit is described. The device is built out of three layers. The bottom layer serves as a seed layer for the center layer, which is alpha tantalum, while the third, topmost, layer is selected for its smoothness, its compatibility with the inter-layer dielectric materials, and its ability to protect the underlying tantalum.

    摘要翻译： 描述了一种制造MTJ器件及其与CMOS集成电路的连接的方法。 该设备由三层构建。 底层用作中心层的种子层，其为α钽，而第三最顶层选择为其平滑度，其与层间电介质材料的相容性以及其保护下面的钽的能力。

    Bottom conductor for integrated MRAM
    5.
    发明申请
    Bottom conductor for integrated MRAM 有权
    集成MRAM的底部导体

    公开(公告)号：US20070281427A1

    公开(公告)日：2007-12-06

    申请号：US11891923

    申请日：2007-08-14

    申请人： Wei Cao ,  Chyu-Jiuh Torng ,  Cheng Horng ,  Ruying Tong ,  Chen-Jung Chien ,  Liubo Hong

    发明人： Wei Cao ,  Chyu-Jiuh Torng ,  Cheng Horng ,  Ruying Tong ,  Chen-Jung Chien ,  Liubo Hong

    IPC分类号： H01L21/336

    CPC分类号： H01L43/12 ,  H01L27/228

    摘要： A method to fabricate an MTJ device and its connections to a CMOS integrated circuit is described. The device is built out of three layers. The bottom layer serves as a seed layer for the center layer, which is alpha tantalum, while the third, topmost, layer is selected for its smoothness, its compatibility with the inter-layer dielectric materials, and its ability to protect the underlying tantalum.

    摘要翻译： 描述了制造MTJ器件及其与CMOS集成电路的连接的方法。 该设备由三层构建。 底层用作中心层的种子层，其为α钽，而第三最顶层选择为其平滑度，其与层间电介质材料的相容性以及其保护下面的钽的能力。

    Bottom conductor for integrated MRAM
    6.
    发明授权
    Bottom conductor for integrated MRAM 有权
    集成MRAM的底部导体

    公开(公告)号：US07265404B2

    公开(公告)日：2007-09-04

    申请号：US11215276

    申请日：2005-08-30

    申请人： Wei Cao ,  Chyu-Jiuh Torng ,  Cheng Horng ,  Ruying Tong ,  Chen-Jung Chien ,  Liubo Hong

    发明人： Wei Cao ,  Chyu-Jiuh Torng ,  Cheng Horng ,  Ruying Tong ,  Chen-Jung Chien ,  Liubo Hong

    IPC分类号： H01L29/76

    CPC分类号： H01L43/12 ,  H01L27/228

    摘要： A structure that is well suited to connecting an MTJ device to a CMOS integrated circuit is described. It is built out of three layers. The bottom layer serves as a seed layer for the center layer, which is alpha tantalum, while the third, topmost, layer is selected for its smoothness, its compatibility with the inter-layer dielectric materials, and its ability to protect the underlying tantalum. A method for its formation is also described.

    摘要翻译： 描述了非常适合于将MTJ设备连接到CMOS集成电路的结构。 它由三层构建。 底层用作中心层的种子层，其为α钽，而第三最顶层选择为其平滑度，其与层间电介质材料的相容性以及其保护下面的钽的能力。 还描述了其形成方法。

    Novel method to form a nonmagnetic cap for the NiFe(free) MTJ stack to enhance dR/R
    8.
    发明申请
    Novel method to form a nonmagnetic cap for the NiFe(free) MTJ stack to enhance dR/R 有权
    为NiFe（自由）MTJ堆叠形成非磁性帽以增强dR / R的新方法

    公开(公告)号：US20070243638A1

    公开(公告)日：2007-10-18

    申请号：US11404446

    申请日：2006-04-14

    申请人： Cheng Horng ,  Hui-Chuan Wang ,  Min Li ,  Ru-Ying Tong ,  Tong Zhao ,  Yimin Guo

    发明人： Cheng Horng ,  Hui-Chuan Wang ,  Min Li ,  Ru-Ying Tong ,  Tong Zhao ,  Yimin Guo

    IPC分类号： H01L21/00

    CPC分类号： H01L43/10 ,  H01L43/08 ,  H01L43/12

    摘要： An MTJ in an MRAM array or TMR read head is disclosed in which a capping layer has a bilayer configuration with a non-magnetic NiFeX inner layer on a NiFe free layer and a Ta layer on the NiFeX layer to improve dR/R and minimize magnetostriction. Optionally, a trilayer configuration may be employed where the Ta layer is sandwiched between an inner NiFeX layer and an outer Ru layer. The X component in NiFeX is preferably an element having an oxidation potential greater than Ni or Fe such as Mg, Hf, Zr, Nb, or Ta. NiFeX is preferably formed by co-sputtering a NiFe target with an X target at a forward power of about 200 W and 50 W, respectively. In an MRAM structure, the Mg content in NiFeMg may be increased to >50 atomic % to improve the gettering power of removing oxygen from the free layer.

    摘要翻译： 公开了一种MRAM阵列或TMR读取头中的MTJ，其中封盖层具有在NiFe自由层上的非磁性NiFeX内层和NiFeX层上的Ta层的双层结构，以改善dR / R并最小化磁致伸缩 。 任选地，可以采用三层结构，其中Ta层夹在内部NiFeX层和外部Ru层之间。 NiFeX中的X成分优选为具有大于Ni，Fe的氧化电位的元素，例如Mg，Hf，Zr，Nb或Ta。 优选通过以约200W和50W的正向功率共同溅射具有X靶的NiFe靶来形成NiFeX。 在MRAM结构中，NiFeMg中的Mg含量可以增加到> 50原子％以提高从自由层除去氧的吸气能力。

    Novel structure and method to fabricate high performance MTJ devices for MRAM applications
    9.
    发明申请
    Novel structure and method to fabricate high performance MTJ devices for MRAM applications 失效
    用于制造用于MRAM应用的高性能MTJ器件的新型结构和方法

    公开(公告)号：US20060208296A1

    公开(公告)日：2006-09-21

    申请号：US11080860

    申请日：2005-03-15

    申请人： Cheng Horng ,  Ru-Ying Tong ,  Mao-Min Chen ,  Liubo Hong ,  Min Li

    发明人： Cheng Horng ,  Ru-Ying Tong ,  Mao-Min Chen ,  Liubo Hong ,  Min Li

    IPC分类号： H01L29/94

    CPC分类号： H01L43/08 ,  B82Y25/00 ,  G01R33/093 ,  G01R33/098 ,  G11B5/3163 ,  G11B5/3906 ,  H01L43/12

    摘要： A high performance MTJ in an MRAM array is disclosed in which the bottom conductor has an amorphous Ta capping layer. A key feature is a surfactant layer comprised of oxygen that is formed on the Ta surface. The resulting smooth and flat Ta capping layer promotes a smooth and flat surface in the MTJ layers which are subsequently formed on the surfactant layer. For a 0.3×0.6 micron MTJ bit size, a 35 to 40 Angstrom thick NiFe(18%) free layer, an AlOx barrier layer generated from a ROX oxidation of an 9 to 10 Angstrom thick Al layer, and a Ru/Ta/Ru capping layer are employed to give a dR/R of >40% and an RA of about 4000 ohm-μm2. The MTJ configuraton is extendable to a 0.2×0.4 micron MTJ bit size.

    摘要翻译： 公开了一种MRAM阵列中的高性能MTJ，其中底部导体具有无定形Ta覆盖层。 关键特征是由在Ta表面上形成的氧构成的表面活性剂层。 得到的平滑且平坦的Ta覆盖层促进MTJ层中平滑且平坦的表面，随后在表面活性剂层上形成。 对于0.3×0.6微米的MTJ位尺寸，35至40埃厚的NiFe（18％）自由层，由9至10埃厚的Al层的ROX氧化产生的AlO x势垒层，以及Ru / Ta / 使用Ru覆盖层来产生大于40％的dR / R和约4000欧姆 - 姆2的RA。 MTJ配置可扩展到0.2x0.4微米的MTJ位大小。

    Novel structure/method to fabricate a high-performance magnetic tunneling junction MRAM
    10.
    发明申请
    Novel structure/method to fabricate a high-performance magnetic tunneling junction MRAM 失效
    制造高性能磁隧道结MRAM的新型结构/方法

    公开(公告)号：US20070015294A1

    公开(公告)日：2007-01-18

    申请号：US11522663

    申请日：2006-09-18

    申请人： Cheng Horng ,  Mao-Min Chen ,  Liubo Hong ,  Ru-Ying Tong

    发明人： Cheng Horng ,  Mao-Min Chen ,  Liubo Hong ,  Ru-Ying Tong

    IPC分类号： H01L21/00

    CPC分类号： H01L43/12 ,  H01L43/08 ,  Y10S977/934 ,  Y10S977/935

    摘要： An MTJ (magnetic tunneling junction) MRAM (magnetic random access memory) cell is formed on a conducting lead and magnetic keeper layer that is capped by a sputter-etched Ta layer. The Ta capping layer has a smooth surface as a result of the sputter-etching and that smooth surface promotes the subsequent formation of a lower electrode (pinning/pinned layer) with smooth, flat layers and a radical oxidized (ROX) Al tunneling barrier layer which is ultra-thin, smooth, and to has a high breakdown voltage. A seed layer of NiCr is formed on the sputter-etched capping layer of Ta. The resulting device has generally improved performance characteristics in terms of its switching characteristics, GMR ratio and junction resistance.

    摘要翻译： 在由溅射蚀刻的Ta层覆盖的导电引线和磁保持层上形成MTJ（磁性隧道结）MRAM（磁性随机存取存储器）单元。 作为溅射蚀刻的结果，Ta覆盖层具有光滑的表面，并且光滑表面促进随后形成具有光滑的平坦层和自由基氧化（ROX）Al隧穿势垒层的下电极（钉扎/钉扎层） 其超薄，光滑，并具有高击穿电压。 在Ta的溅射蚀刻的覆盖层上形成NiCr种子层。 在其开关特性，GMR比和结电阻方面，所得到的器件通常具有改进的性能特性。