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公开(公告)号:US20050094349A1
公开(公告)日:2005-05-05
申请号:US10696133
申请日:2003-10-29
申请人: Cheng-Liang Chang , Ray Chuang , Jen Wei , Chian-Kuo Huang , Huan-Wen Lai , Ching-Sun Lee , Cheng-Yua Chuang , Chi-Ching Lo , Neo-Feng Chiou , Yen-Bo Huang
发明人: Cheng-Liang Chang , Ray Chuang , Jen Wei , Chian-Kuo Huang , Huan-Wen Lai , Ching-Sun Lee , Cheng-Yua Chuang , Chi-Ching Lo , Neo-Feng Chiou , Yen-Bo Huang
IPC分类号: C23C16/458 , H01L21/683 , H02H1/00
CPC分类号: C23C16/4586 , C23C16/4581 , H01L21/6831
摘要: A disassembling device for separating a pedestal, a ceramic element and a base from an electrostatic chuck assembly. The base has a first end surface and a second end surface. The ceramic element is disposed on the first end surface. The pedestal is disposed on the ceramic element. The disassembling device includes a main body and at least one pushing element. The main body is disposed on the second end surface and has a through hole. The at least one pushing element penetrates the through hole and pushes against the ceramic element and pedestal to separate the ceramic element and pedestal from the first end surface of the base.
摘要翻译: 一种用于从静电卡盘组件分离基座,陶瓷元件和基座的拆卸装置。 底座具有第一端面和第二端面。 陶瓷元件设置在第一端面上。 基座设置在陶瓷元件上。 拆卸装置包括主体和至少一个推动元件。 主体设置在第二端面上并具有通孔。 至少一个推动元件穿过通孔并推动陶瓷元件和基座,以将陶瓷元件和基座与基座的第一端面分开。
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公开(公告)号:US07102871B2
公开(公告)日:2006-09-05
申请号:US10696133
申请日:2003-10-29
申请人: Cheng-Liang Chang , Ray Chuang , Jen Wei , Chian-Kuo Huang , Huan-Wen Lai , Ching-Sun Lee , Cheng-Yua Chuang , Chi-Ching Lo , Neo-Feng Chiou , Yen-Bo Huang
发明人: Cheng-Liang Chang , Ray Chuang , Jen Wei , Chian-Kuo Huang , Huan-Wen Lai , Ching-Sun Lee , Cheng-Yua Chuang , Chi-Ching Lo , Neo-Feng Chiou , Yen-Bo Huang
IPC分类号: H01T23/00
CPC分类号: C23C16/4586 , C23C16/4581 , H01L21/6831
摘要: A disassembling device for separating a pedestal, a ceramic element and a base from an electrostatic chuck assembly. The base has a first end surface and a second end surface. The ceramic element is disposed on the first end surface. The pedestal is disposed on the ceramic element. The disassembling device includes a main body and at least one pushing element. The main body is disposed on the second end surface and has a through hole. The at least one pushing element penetrates the through hole and pushes against the ceramic element and pedestal to separate the ceramic element and pedestal from the first end surface of the base.
摘要翻译: 一种用于从静电卡盘组件分离基座,陶瓷元件和基座的拆卸装置。 底座具有第一端面和第二端面。 陶瓷元件设置在第一端面上。 基座设置在陶瓷元件上。 拆卸装置包括主体和至少一个推动元件。 主体设置在第二端面上并具有通孔。 至少一个推动元件穿过通孔并推动陶瓷元件和基座,以将陶瓷元件和基座与基座的第一端面分开。
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公开(公告)号:US07183199B2
公开(公告)日:2007-02-27
申请号:US10724201
申请日:2003-12-01
申请人: Chi-Wen Liu , Jung-Chih Tsao , Shien-Ping Feng , Kei-Wei Chen , Shih-Chi Lin , Ray Chuang
发明人: Chi-Wen Liu , Jung-Chih Tsao , Shien-Ping Feng , Kei-Wei Chen , Shih-Chi Lin , Ray Chuang
IPC分类号: H01L21/4763
CPC分类号: H01L21/3212 , H01L21/7684
摘要: A method of reducing the pattern effect in the CMP process. The method comprises the steps of providing a semiconductor substrate having a patterned dielectric layer, a barrier layer on the patterned dielectric layer, and a conductive layer on the barrier layer; performing a first CMP process to remove part of the conductive layer before the barrier layer is polished, thereby a step height of the conductive layer is reduced; depositing a layer of material substantially the same as the conductive layer on the conductive layer; and performing a second CMP process to expose the dielectric layer. A method of eliminating the dishing phenomena after a CMP process and a CMP rework method are also provided.
摘要翻译: 降低CMP工艺中图案效果的方法。 该方法包括以下步骤:提供具有图案化介电层的半导体衬底,图案化电介质层上的阻挡层和阻挡层上的导电层; 在阻挡层被抛光之前执行第一CMP工艺以去除导电层的一部分,从而降低导电层的台阶高度; 在导电层上沉积与导电层基本相同的材料层; 以及执行第二CMP工艺以暴露所述电介质层。 还提供了在CMP处理和CMP返工方法之后消除凹陷现象的方法。
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公开(公告)号:US20050085066A1
公开(公告)日:2005-04-21
申请号:US10687183
申请日:2003-10-16
申请人: Jung-Chih Tsao , Chi-Wen Li , Kei-Wei Chen , Jye-Wei Hsu , Hsien-Pin Fong , Steven Lin , Ray Chuang
发明人: Jung-Chih Tsao , Chi-Wen Li , Kei-Wei Chen , Jye-Wei Hsu , Hsien-Pin Fong , Steven Lin , Ray Chuang
IPC分类号: H01L21/22 , H01L21/288 , H01L21/38 , H01L21/44 , H01L21/4763 , H01L21/768
CPC分类号: H01L21/76877 , H01L21/288 , H01L21/7684
摘要: A method of forming a copper interconnect in an opening within a pattern is described. The copper interconnect has an Rs that is nearly independent of opening width and pattern density. A first copper layer having a concave upper surface and thickness t1 is formed in a via or trench in a dielectric layer by depositing copper and performing a first CMP step. A second copper layer with a thickness t2 where t2≦t1 and having a convex lower surface is deposited on the first copper layer by a selective electroplating method. The first and second copper layers are annealed and then a second CMP step planarizes the second copper layer to become coplanar with the dielectric layer. The invention is also a copper interconnect comprised of the aforementioned copper layers where the first copper layer has a grain density (GD1)≧GD2 for the second copper layer.
摘要翻译: 描述了在图案内的开口中形成铜互连的方法。 铜互连具有几乎独立于开口宽度和图案密度的Rs。 通过沉积铜并执行第一CMP步骤,在电介质层中的通孔或沟槽中形成具有凹上表面和厚度t 1的第一铜层。 具有厚度为2 sub>的第二铜层,其中具有凸下表面的第二铜层沉积在第一铜层上 通过选择性电镀方法。 对第一和第二铜层进行退火,然后第二CMP步骤将第二铜层平坦化成与电介质层共面。 本发明也是由上述铜层构成的铜布线,其中第一铜层具有第二铜层的晶粒密度(G SUB D1)= G D2 D2。
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公开(公告)号:US20080067076A1
公开(公告)日:2008-03-20
申请号:US11523135
申请日:2006-09-19
申请人: Ming-Yuan Cheng , Hsien-Ping Feng , Hsi-Kuei Cheng , Kei-Wei Chen , Jung-Chin Tsao , Steven Lin , Ray Chuang
发明人: Ming-Yuan Cheng , Hsien-Ping Feng , Hsi-Kuei Cheng , Kei-Wei Chen , Jung-Chin Tsao , Steven Lin , Ray Chuang
IPC分类号: C25D3/00
摘要: A novel method, which is suitable to substantially reduce the presence of oxygen micro-bubbles in an electroplating bath solution, is disclosed. The method includes the addition of aerobic bacteria to the electroplating bath solution to consume oxygen in the solution. Reduction of the oxygen content in the electroplating bath solution prevents oxygen micro-bubbles from forming in the solution and becoming trapped between the solution and the surface of a metal seed layer on a substrate to block the electroplating of a metal film onto the seed layer. Consequently, the presence of surface pits and other structural defects in the surface of the electroplated metal film is substantially reduced.
摘要翻译: 公开了一种适合于显着减少电镀浴液中氧微气泡存在的新方法。 该方法包括向电镀浴溶液中加入需氧细菌以消耗溶液中的氧气。 电镀浴溶液中的氧含量的降低防止溶液中形成氧微气泡并被困在溶液与基底上的金属种子层的表面之间,以阻止金属膜在种子层上的电镀。 因此,电镀金属膜的表面中存在表面凹坑等结构缺陷。
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6.
公开(公告)号:US07030016B2
公开(公告)日:2006-04-18
申请号:US10812729
申请日:2004-03-30
申请人: Hsien-Ping Feng , Jung-Chih Tsao , Hsi-Kuei Cheng , Chih-Tsung Lee , Ming-Yuan Cheng , Steven Lin , Ray Chuang , Chi-Wen Liu
发明人: Hsien-Ping Feng , Jung-Chih Tsao , Hsi-Kuei Cheng , Chih-Tsung Lee , Ming-Yuan Cheng , Steven Lin , Ray Chuang , Chi-Wen Liu
IPC分类号: H01L21/44
CPC分类号: H01L21/76877 , H01L21/2885
摘要: A method of forming a copper interconnect in a dual damascene scheme is described. After a diffusion barrier layer and seed layer are sequentially formed on the sidewalls and bottoms of a trench and via in a dielectric layer, a first copper layer is deposited by a first ECP process at a 10 mA/cm2 current density to fill the via and part of the trench. A first anneal step is performed to remove carbon impurities and optionally includes a H2 plasma treatment. A second ECP process with a first deposition step at a 40 mA/cm2 current density and second deposition step at a 60 mA/cm2 current density is used to deposit a second copper layer-that overfills the trench. After a second anneal step, a CMP process planarizes the copper layers. Fewer copper defects, reduced S, Cl, and C impurities, and improved Rc performance are achieved by this method.
摘要翻译: 描述了在双镶嵌方案中形成铜互连的方法。 在扩散阻挡层和种子层依次形成在电介质层中的沟槽和通孔的侧壁和底部上之后,通过第一ECP工艺以10mA / cm 2 / >电流密度以填充通孔和部分沟槽。 进行第一退火步骤以除去碳杂质,并且任选地包括H 2 O 3等离子体处理。 使用在40mA / cm 2电流密度下的第一沉积步骤和以60mA / cm 2电流密度进行第二沉积步骤的第二个ECP工艺来沉积 第二铜层 - 过度填充沟槽。 在第二退火步骤之后,CMP工艺使铜层平坦化。 通过该方法可以实现更少的铜缺陷,降低的S,Cl和C杂质,以及Rc性能的提高。
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7.
公开(公告)号:US20050227479A1
公开(公告)日:2005-10-13
申请号:US10812729
申请日:2004-03-30
申请人: Hsien-Ping Feng , Jung-Chih Tsao , Hsi-Kuei Cheng , Chih-Tsung Lee , Ming-Yuan Cheng , Steven Lin , Ray Chuang , Chi-Wen Liu
发明人: Hsien-Ping Feng , Jung-Chih Tsao , Hsi-Kuei Cheng , Chih-Tsung Lee , Ming-Yuan Cheng , Steven Lin , Ray Chuang , Chi-Wen Liu
IPC分类号: H01L21/311 , H01L21/768
CPC分类号: H01L21/76877 , H01L21/2885
摘要: A method of forming a copper interconnect in a dual damascene scheme is described. After a diffusion barrier layer and seed layer are sequentially formed on the sidewalls and bottoms of a trench and via in a dielectric layer, a first copper layer is deposited by a first ECP process at a 10 mA/cm2 current density to fill the via and part of the trench. A first anneal step is performed to remove carbon impurities and optionally includes a H2 plasma treatment. A second ECP process with a first deposition step at a 40 mA/cm2 current density and second deposition step at a 60 mA/cm2 current density is used to deposit a second copper layer-that overfills the trench. After a second anneal step, a CMP process planarizes the copper layers. Fewer copper defects, reduced S, Cl, and C impurities, and improved Rc performance are achieved by this method.
摘要翻译: 描述了在双镶嵌方案中形成铜互连的方法。 在扩散阻挡层和种子层依次形成在电介质层中的沟槽和通孔的侧壁和底部上之后,通过第一ECP工艺以10mA / cm 2 / >电流密度以填充通孔和部分沟槽。 进行第一退火步骤以除去碳杂质,并且任选地包括H 2 O 3等离子体处理。 使用在40mA / cm 2电流密度下的第一沉积步骤和以60mA / cm 2电流密度进行第二沉积步骤的第二个ECP工艺来沉积 第二铜层 - 过度填充沟槽。 在第二退火步骤之后,CMP工艺使铜层平坦化。 通过该方法可以实现更少的铜缺陷,降低的S,Cl和C杂质,以及Rc性能的提高。
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公开(公告)号:US20050121329A1
公开(公告)日:2005-06-09
申请号:US10731331
申请日:2003-12-05
申请人: Jung-Chih Tsao , Kei-Wei Chen , Chi-Wen Liu , Shi-Chi Lin , Ray Chuang
发明人: Jung-Chih Tsao , Kei-Wei Chen , Chi-Wen Liu , Shi-Chi Lin , Ray Chuang
IPC分类号: C25D5/02 , C25D5/06 , C25D7/12 , C25D17/14 , H01L21/288
CPC分类号: H01L21/2885 , C25D5/06 , C25D17/001 , C25D17/14
摘要: A thrust pad assembly which is capable of reducing the quantity of metal electroplated onto the edge region of a substrate to eliminate or reduce the need for edge bevel cleaning or removal of excess metal from the substrate after the electroplating process. The thrust pad assembly includes an air platen through which air is applied at variable pressures to the central and edge regions, respectively, of a thrust pad. The thrust pad applies pressure to a contact ring connected to an electroplating voltage source. The contact ring applies relatively less pressure to the edge region than to the central region of the substrate, thereby reducing the ohmic contact.
摘要翻译: 一种止推垫组件,其能够减少电镀到基板的边缘区域上的金属的量,以消除或减少在电镀工艺之后边缘斜面清洁或从基板上去除多余的金属的需要。 推力垫组件包括空气压板,空气压板分别通过空气压板以可变的压力施加到推力垫的中心和边缘区域。 推力垫对连接到电镀电压源的接触环施加压力。 接触环对边缘区域的压力相对于衬底的中心区域施加相对较小的压力,由此减小欧姆接触。
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公开(公告)号:US07667835B2
公开(公告)日:2010-02-23
申请号:US11510951
申请日:2006-08-28
申请人: Hsi-Kuei Cheng , Jung-Chih Tsao , Hsien-Ping Feng , Ming-Yuan Cheng , Steven Lin , Ray Chuang
发明人: Hsi-Kuei Cheng , Jung-Chih Tsao , Hsien-Ping Feng , Ming-Yuan Cheng , Steven Lin , Ray Chuang
CPC分类号: C25D17/00 , C25D7/123 , C25D17/001 , C25D21/12 , G01N21/55 , G01N2021/8411 , H01L21/67005 , H01L21/67253
摘要: An apparatus and method for preventing the peeling of electroplated metal from a wafer, is disclosed. The apparatus includes a seed layer detector system having a light source and a reflectivity detector. According to the method, the light source emits a beam of light onto a wafer and the reflectivity detector receives the light reflected from the wafer. The reflectivity of the wafer surface is measured to determine the presence or absence of a seed layer on the wafer, as well as whether the seed layer has a minimum thickness for optimum electroplating of a metal onto the seed layer.
摘要翻译: 公开了一种用于防止电镀金属从晶片剥离的装置和方法。 该装置包括具有光源和反射率检测器的种子层检测器系统。 根据该方法,光源将光束发射到晶片上,反射率检测器接收从晶片反射的光。 测量晶片表面的反射率以确定晶片上晶种层的存在或不存在,以及种子层是否具有用于最佳电镀金属到籽晶层上的最小厚度。
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10.
公开(公告)号:US07432192B2
公开(公告)日:2008-10-07
申请号:US11347946
申请日:2006-02-06
申请人: Hsien-Ping Feng , Jung-Chih Tsao , Hsi-Kuei Cheng , Chih-Tsung Lee , Ming-Yuan Cheng , Steven Lin , Ray Chuang , Chi-Wen Liu
发明人: Hsien-Ping Feng , Jung-Chih Tsao , Hsi-Kuei Cheng , Chih-Tsung Lee , Ming-Yuan Cheng , Steven Lin , Ray Chuang , Chi-Wen Liu
IPC分类号: H01L21/4763
CPC分类号: H01L21/76877 , H01L21/2885
摘要: A method of forming a copper interconnect in a dual damascene scheme is described. After a diffusion barrier layer and seed layer are sequentially formed on the sidewalls and bottoms of a trench and via in a dielectric layer, a first copper layer is deposited by a first ECP process at a 10 mA/cm2 current density to fill the via and part of the trench. A first anneal step is performed to remove carbon impurities and optionally includes a H2 plasma treatment. A second ECP process with a first deposition step at a 40 mA/cm2 current density and second deposition step at a 60 mA/cm2 current density is used to deposit a second copper layer that overfills the trench. After a second anneal step, a CMP process planarizes the copper layers. Fewer copper defects, reduced S, Cl, and C impurities, and improved Rc performance are achieved by this method.
摘要翻译: 描述了在双镶嵌方案中形成铜互连的方法。 在扩散阻挡层和种子层依次形成在电介质层中的沟槽和通孔的侧壁和底部上之后,通过第一ECP工艺以10mA / cm 2 / >电流密度以填充通孔和部分沟槽。 进行第一退火步骤以除去碳杂质,并且任选地包括H 2 O 3等离子体处理。 使用在40mA / cm 2电流密度下的第一沉积步骤和以60mA / cm 2电流密度进行第二沉积步骤的第二个ECP工艺来沉积 第二铜层超过沟槽。 在第二退火步骤之后,CMP工艺使铜层平坦化。 通过该方法可以实现更少的铜缺陷,降低的S,Cl和C杂质,以及Rc性能的提高。
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