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    Process for operating an electronic device including a memory array and conductive lines
    2.
    发明授权
    Process for operating an electronic device including a memory array and conductive lines 有权
    用于操作包括存储器阵列和导线的电子设备的工艺

    公开(公告)号：US07262997B2

    公开(公告)日：2007-08-28

    申请号：US11188898

    申请日：2005-07-25

    申请人： Jane A. Yater ,  Gowrishankar L. Chindalore ,  Cheong M. Hong

    发明人： Jane A. Yater ,  Gowrishankar L. Chindalore ,  Cheong M. Hong

    IPC分类号： G11C16/04 ,  G11C11/34

    CPC分类号： G11C16/10

    摘要： An electronic circuit can include a first memory cell and a second memory cell. In one embodiment, source/drain regions of the first and second memory cells can be electrically connected to each other. The source/drain regions may electrically float regardless of direction in which carriers flow through channel regions of the memory cells. In another embodiment, the first memory cell can be electrically connected to a first gate line, and the second memory cell can be electrically connected to a greater number of gate lines as compared to the first memory cell. In another aspect, the first and second memory cells are connected to the same bit line. Such bit line can electrically float when programming or reading the first memory cell or the second memory cell or any combination thereof.

    摘要翻译： 电子电路可以包括第一存储单元和第二存储单元。 在一个实施例中，第一和第二存储器单元的源极/漏极区域可彼此电连接。 源极/漏极区域可以电浮动，而不管载流子流过存储器单元的沟道区域的方向如何。 在另一个实施例中，与第一存储器单元相比，第一存储单元可以电连接到第一栅极线，并且第二存储单元可以电连接到更多数量的栅极线。 在另一方面，第一和第二存储器单元连接到相同的位线。 当编程或读取第一存储器单元或第二存储单元或其任何组合时，这种位线可以电浮动。

    Floating gate non-volatile memory and method thereof
    5.
    发明授权
    Floating gate non-volatile memory and method thereof 有权
    浮动门非易失性存储器及其方法

    公开(公告)号：US07622349B2

    公开(公告)日：2009-11-24

    申请号：US11302937

    申请日：2005-12-14

    申请人： Michael A. Sadd ,  Gowrishankar L. Chindalore ,  Cheong M. Hong

    发明人： Michael A. Sadd ,  Gowrishankar L. Chindalore ,  Cheong M. Hong

    IPC分类号： H01L21/8239 ,  H01L21/28

    CPC分类号： H01L29/792 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/42324 ,  H01L29/4234 ,  H01L29/7881

    摘要： A method is provided which includes forming a first gate overlying a major surface of an electronic device substrate and forming a second gate overlying and spaced apart from the first gate. The method further includes forming a charge storage structure horizontally adjacent to, and continuous along, the first gate and the second gate, wherein a major surface of the charge storage structure is substantially vertical to the major surface of the substrate.

    摘要翻译： 提供了一种方法，其包括形成覆盖在电子器件基板的主表面上的第一栅极并且形成覆盖并与第一栅极间隔开的第二栅极。 该方法还包括形成电荷存储结构，该电荷存储结构沿着第一栅极和第二栅极水平相邻并连续地延伸，其中电荷存储结构的主表面基本上垂直于衬底的主表面。

    Electronic device including discontinuous storage elements
    6.
    发明授权
    Electronic device including discontinuous storage elements 有权
    电子设备包括不连续的存储元件

    公开(公告)号：US07582929B2

    公开(公告)日：2009-09-01

    申请号：US11188999

    申请日：2005-07-25

    申请人： Michael A. Sadd ,  Ko-Min Chang ,  Gowrishankar L. Chindalore ,  Cheong M. Hong ,  Craig T. Swift

    发明人： Michael A. Sadd ,  Ko-Min Chang ,  Gowrishankar L. Chindalore ,  Cheong M. Hong ,  Craig T. Swift

    IPC分类号： H01L29/94

    CPC分类号： H01L29/7887 ,  B82Y10/00 ,  H01L21/28273 ,  H01L27/115 ,  H01L27/11556 ,  H01L29/42328 ,  H01L29/42332 ,  H01L29/42336 ,  H01L29/66825

    摘要： An electronic device can include discontinuous storage elements that lie within a trench. In one embodiment, the electronic device can include a substrate having a trench that includes a wall and a bottom. The electronic device can also include a portion of discontinuous storage elements that lie within the trench. The electronic device can also include a first gate electrode, wherein at least one discontinuous storage element lies along the wall of the trench at an elevation between and upper surface of the first gate electrode and a primary surface of the substrate. The electronic device can also include a second gate electrode overlying the first gate electrode and the primary surface of the substrate. In another embodiment, a conductive line can be electrically connected to one or more rows or columns of memory cells, and another conductive line can be more rows or more columns of memory cells.

    摘要翻译： 电子设备可以包括位于沟槽内的不连续存储元件。 在一个实施例中，电子设备可以包括具有包括壁和底部的沟槽的衬底。 电子设备还可以包括位于沟槽内的不连续存储元件的一部分。 电子器件还可以包括第一栅电极，其中至少一个不连续存储元件沿着沟槽的壁位于第一栅电极的上表面和衬底的主表面之间的高度处。 电子器件还可以包括覆盖在第一栅电极和衬底的主表面上的第二栅电极。 在另一个实施例中，导线可以电连接到一个或多个存储单元的行或列，而另一个导线可以是更多行或更多列的存储单元。

    Electronic device including discontinuous storage elements
    7.
    发明授权
    Electronic device including discontinuous storage elements 有权
    电子设备包括不连续的存储元件

    公开(公告)号：US07205608B2

    公开(公告)日：2007-04-17

    申请号：US11188910

    申请日：2005-07-25

    申请人： Gowrishankar L. Chindalore ,  Cheong M. Hong ,  Craig T. Swift

    发明人： Gowrishankar L. Chindalore ,  Cheong M. Hong ,  Craig T. Swift

    IPC分类号： H01L29/76 ,  H01L21/336

    CPC分类号： H01L29/7887 ,  B82Y10/00 ,  G11C16/0475 ,  H01L21/28273 ,  H01L27/115 ,  H01L27/11556 ,  H01L29/42328 ,  H01L29/42332 ,  H01L29/42336 ,  H01L29/66825 ,  Y10S977/707 ,  Y10S977/712

    摘要： An electronic device can include a substrate having a trench that includes a wall and a bottom. The electronic device can also include a first set of discontinuous storage elements that overlie a primary surface of the substrate and a second set of discontinuous storage elements that lie within the trench. The electronic device can also include a first gate electrode, wherein substantially none of the discontinuous storage elements lies along the wall of the trench at an elevation between and upper surface of the first gate electrode and the primary surface of the substrate. The electronic device can also include a second gate electrode overlying the first gate electrode and the primary surface. In another embodiment, a conductive line can be electrically connected to one or more rows or columns of memory cells, and another conductive line can be more rows or more columns of memory cells.

    摘要翻译： 电子设备可以包括具有包括壁和底部的沟槽的衬底。 电子设备还可以包括覆盖在衬底的主表面上的第一组不连续存储元件和位于沟槽内的第二组不连续存储元件。 电子器件还可以包括第一栅电极，其中在第一栅电极和衬底的主表面之间的上表面和第一栅极电极的上表面之间基本上不存在不连续的存储元件沿着沟槽的壁。 电子器件还可以包括覆盖第一栅电极和主表面的第二栅电极。 在另一个实施例中，导线可以电连接到一个或多个存储单元的行或列，而另一个导线可以是更多行或更多列的存储单元。

    Electronic device including a memory array and conductive lines
    10.
    发明授权
    Electronic device including a memory array and conductive lines 有权
    电子设备包括存储器阵列和导线

    公开(公告)号：US07471560B2

    公开(公告)日：2008-12-30

    申请号：US11834391

    申请日：2007-08-06

    申请人： Jane A. Yater ,  Gowrishankar L. Chindalore ,  Cheong M. Hong

    发明人： Jane A. Yater ,  Gowrishankar L. Chindalore ,  Cheong M. Hong

    IPC分类号： G11C11/34

    CPC分类号： G11C16/10

    摘要： An electronic circuit can include a first memory cell and a second memory cell. In one embodiment, source/drain regions of the first and second memory cells can be electrically connected to each other. The source/drain regions may electrically float regardless of direction in which carriers flow through channel regions of the memory cells. In another embodiment, the first memory cell can be electrically connected to a first gate line, and the second memory cell can be electrically connected to a greater number of gate lines as compared to the first memory cell. In another aspect, the first and second memory cells are connected to the same bit line. Such bit line can electrically float when programming or reading the first memory cell or the second memory cell or any combination thereof.

    摘要翻译： 电子电路可以包括第一存储单元和第二存储单元。 在一个实施例中，第一和第二存储器单元的源极/漏极区域可彼此电连接。 源极/漏极区域可以电浮动，而不管载流子流过存储器单元的沟道区域的方向如何。 在另一个实施例中，与第一存储器单元相比，第一存储单元可以电连接到第一栅极线，并且第二存储单元可以电连接到更多数量的栅极线。 在另一方面，第一和第二存储器单元连接到相同的位线。 当编程或读取第一存储器单元或第二存储单元或其任何组合时，这种位线可以电浮动。