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    Dual port static RAM with bidirectional shift capability
    3.
    发明授权
    Dual port static RAM with bidirectional shift capability 失效
    具有双向移位功能的双端口静态RAM

    公开(公告)号：US5299156A

    公开(公告)日：1994-03-29

    申请号：US542689

    申请日：1990-06-25

    Applicant: Ching-Lin Jiang ,  Clark R. Williams

    Inventor： Ching-Lin Jiang ,  Clark R. Williams

    IPC: G06F5/06 ,  G11C8/16 ,  G11C11/41 ,  G11C11/412 ,  G11C19/28 ,  G11C11/419

    CPC classification number: G11C11/412 ,  G06F5/065 ,  G11C11/41 ,  G11C19/287 ,  G11C8/16

    Abstract: A dual storage cell memory includes an array of dual storage cells, each of the dual storage cells containing a first memory cell and a second memory cell. The first and second memory cells are well known six-transistor static memory cells with the addition of transfer circuitry for transferring data directly from the internal data nodes of each of the memory cells to its corresponding complementary memory cell without requiring the use of the enable transistors or the bit lines associated with each of the dual storage cells.

    Abstract translation: 双存储单元存储器包括双存储单元的阵列，每个双存储单元包含第一存储单元和第二存储单元。 第一和第二存储器单元是众所周知的六晶体管静态存储单元，其具有用于将数据直接从每个存储器单元的内部数据节点传送到其对应的互补存储器单元的传输电路，而不需要使用使能晶体管 或与每个双存储单元相关联的位线。

    Two-mode oscillator
    4.
    发明授权
    Two-mode oscillator 失效
    双模式振荡器

    公开(公告)号：US5150079A

    公开(公告)日：1992-09-22

    申请号：US717238

    申请日：1991-06-18

    Applicant: Clark R. Williams ,  Ching-Lin Jiang

    Inventor： Clark R. Williams ,  Ching-Lin Jiang

    IPC: H03B5/36

    CPC classification number: H03B5/364 ,  H03B2200/0012

    Abstract: A low-power crystal-controlled CMOS oscillator wherein a long and wide additional transistor is provided in the first stage of the output amplifier. This prevents the output amplifier from diverting too much current from the primary amplifier stage during start-up.

    Abstract translation: 一种低功率晶体控制CMOS振荡器，其中在输出放大器的第一级提供长而宽的附加晶体管。 这可以防止输出放大器在启动期间从初级放大器级转移太多的电流。

    Dual storage cell memory
    6.
    发明授权
    Dual storage cell memory 失效
    双存储单元存储器

    公开(公告)号：US6118690A

    公开(公告)日：2000-09-12

    申请号：US563152

    申请日：1995-11-27

    Applicant: Ching-Lin Jiang ,  Clark R. Williams

    Inventor： Ching-Lin Jiang ,  Clark R. Williams

    IPC: G06F5/06 ,  G11C8/16 ,  G11C11/41 ,  G11C11/412 ,  G11C19/28 ,  G11C11/419

    CPC classification number: G06F5/065 ,  G11C11/41 ,  G11C11/412 ,  G11C19/287 ,  G11C8/16

    Abstract: A dual storage cell memory includes an array of dual storage cells, each of the dual storage cells containing a first memory cell and a second memory cell. The first and second memory cells are well known six-transistor static memory cells with the addition of transfer circuitry for transferring data directly from the internal data nodes of each of the memory cells to its corresponding complementary memory cell without requiring the use of the enable transistors or the bit lines associated with each of the dual storage cells.

    Abstract translation: 双存储单元存储器包括双存储单元的阵列，每个双存储单元包含第一存储单元和第二存储单元。 第一和第二存储器单元是众所周知的六晶体管静态存储单元，其具有用于将数据直接从每个存储器单元的内部数据节点传送到其对应的互补存储器单元的传输电路，而不需要使用使能晶体管 或与每个双存储单元相关联的位线。

    Dual storage cell memory including data transfer circuits
    8.
    发明授权
    Dual storage cell memory including data transfer circuits 失效
    双存储单元存储器，包括数据传输电路

    公开(公告)号：US4873665A

    公开(公告)日：1989-10-10

    申请号：US203424

    申请日：1988-06-07

    Applicant: Ching-Lin Jiang ,  Clark R. Williams

    Inventor： Ching-Lin Jiang ,  Clark R. Williams

    IPC: G06F5/06 ,  G11C8/16 ,  G11C11/41 ,  G11C11/412 ,  G11C19/28

    CPC classification number: G11C11/412 ,  G06F5/065 ,  G11C11/41 ,  G11C19/287 ,  G11C8/16

    Abstract: A dual storage cell memory includes an array of dual storage cells, each of the dual storage cells containing a first memory cell and a second memory cell. The first and second memory cells are well known six-transistor static memory cells with the addition of transfer circuitry for transferring data directly from the internal data nodes of each of the memory cells to its corresponding complementary memory cell without requiring the use of the enable transistors or the bit lines associated with each of the dual storage cells.

    Abstract translation: 双存储单元存储器包括双存储单元的阵列，每个双存储单元包含第一存储单元和第二存储单元。 第一和第二存储器单元是众所周知的六晶体管静态存储单元，其具有用于将数据直接从每个存储器单元的内部数据节点传送到其对应的互补存储器单元的传输电路，而不需要使用使能晶体管 或与每个双存储单元相关联的位线。

    Space-saving back-up power supply
    9.
    发明授权
    Space-saving back-up power supply 失效
    节省空间的备用电源

    公开(公告)号：US4645943A

    公开(公告)日：1987-02-24

    申请号：US660937

    申请日：1984-10-15

    Applicant: John W. Smith, Jr. ,  Francis A. Scherpenberg ,  Ching-Lin Jiang ,  Michael L. Bolan

    Inventor： John W. Smith, Jr. ,  Francis A. Scherpenberg ,  Ching-Lin Jiang ,  Michael L. Bolan

    IPC: G06F1/30 ,  H02J9/06 ,  H02J9/02

    CPC classification number: G06F1/30 ,  H02J9/061 ,  Y10T307/615 ,  Y10T307/625

    Abstract: A space-saving back-up power supply apparatus has length and width dimensions substantially the same as those of a conventional integrated circuit connector. The apparatus includes sockets arranged on its top for making connection to a socket-pluggable integrated circuit such as a standard CMOS RAM, and the apparatus has pins extending from its bottom for making connection to a printed circuit board or connector of a host electronic system. Control circuitry and one or more batteries are located within the apparatus. The back-up power supply is operative to provide power to the socket-pluggable integrated circuit even if the normal power supply of the host electronic system is short-circuited. The control circuitry of the back-up power supply controls the chip enable signal and performs a battery test upon power-up.

    Abstract translation: 节省空间的备用电源设备的长度和宽度尺寸基本上与传统的集成电路连接器相同。 该设备包括设置在其顶部的插座，用于连接到诸如标准CMOS RAM的插座可插拔集成电路，并且该设备具有从其底部延伸的引脚，用于连接到主机电子系统的印刷电路板或连接器。 控制电路和一个或多个电池位于设备内。 即使主机电子系统的正常电源短路，备用电源也可以为插座可插拔集成电路供电。 备用电源的控制电路控制芯片使能信号，并在上电时执行电池测试。

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