Processor architecture for executing instructions using wide operands
    2.
    发明申请
    Processor architecture for executing instructions using wide operands 有权
    用于使用宽操作数执行指令的处理器架构

    公开(公告)号:US20090113187A1

    公开(公告)日:2009-04-30

    申请号:US11982106

    申请日:2007-10-31

    IPC分类号: G06F9/315

    摘要: A programmable processor and method for improving the performance of processors by expanding at least two source operands, or a source and a result operand, to a width greater than the width of either the general purpose register or the data path width. The present invention provides operands which are substantially larger than the data path width of the processor by using the contents of a general purpose register to specify a memory address at which a plurality of data path widths of data can be read or written, as well as the size and shape of the operand. In addition, several instructions and apparatus for implementing these instructions are described which obtain performance advantages if the operands are not limited to the width and accessible number of general purpose registers.

    摘要翻译: 一种可编程处理器和方法,用于通过将至少两个源操作数或源和结果操作数扩展到大于通用寄存器或数据路径宽度的宽度的宽度来提高处理器的性能。 本发明通过使用通用寄存器的内容来指定可以读取或写入数据的多个数据路径宽度的存储器地址,并且基本上大于处理器的数据路径宽度的操作数,以及 操作数的大小和形状。 此外,描述了用于实现这些指令的几个指令和装置,其如果操作数不限于通用寄存器的宽度和可访问数量,则获得性能优点。

    Processor for performing group floating-point operations
    3.
    发明授权
    Processor for performing group floating-point operations 有权
    用于执行组浮点运算的处理器

    公开(公告)号:US07516308B2

    公开(公告)日:2009-04-07

    申请号:US10436340

    申请日:2003-05-13

    IPC分类号: G06F9/302

    摘要: A system and method expands a source operand to a width greater than that of a general purpose register or a data path. Operands are provided substantially larger than the data path width of a processor. The general purpose register specifies a memory address from which several data path widths of data are read. A data path functional unit is augmented with dedicated storage to which the memory operand is copied on initial execution of the instruction. Further instructions specifying the same memory address read the dedicated storage to obtain the operand value, upon verification that the memory operand has not been altered by intervening instructions. If the memory operand remains current, the memory operand fetch is combined with register operands in the functional unit, producing a result the size of a general register, so no dedicated storage is required for the result.

    摘要翻译: 系统和方法将源操作数扩展到大于通用寄存器或数据路径的宽度。 提供的操作数比处理器的数据路径宽度大得多。 通用寄存器指定读取数据的数据路径宽度的存储器地址。 在指令的初始执行时,对存储器操作数进行复制的专用存储器来增强数据路径功能单元。 指定相同存储器地址的进一步指令读取专用存储器以获得操作数值,在验证存储器操作数没有被介入指令改变时。 如果存储器操作数保持当前,则存储器操作数获取与功能单元中的寄存器操作数组合,产生通用寄存器的大小的结果,因此不需要专用存储器。

    Processor for executing switch and translate instructions requiring wide operands
    4.
    发明申请
    Processor for executing switch and translate instructions requiring wide operands 有权
    用于执行切换和转换需要广泛操作数的指令的处理器

    公开(公告)号:US20080189512A1

    公开(公告)日:2008-08-07

    申请号:US11982171

    申请日:2007-10-31

    IPC分类号: G06F9/00

    摘要: A programmable processor and method for improving the performance of processors by expanding at least two source operands, or a source and a result operand, to a width greater than the width of either the general purpose register or the data path width. The present invention provides operands which are substantially larger than the data path width of the processor by using the contents of a general purpose register to specify a memory address at which a plurality of data path widths of data can be read or written, as well as the size and shape of the operand. In addition, several instructions and apparatus for implementing these instructions are described which obtain performance advantages if the operands are not limited to the width and accessible number of general purpose registers.

    摘要翻译: 一种可编程处理器和方法,用于通过将至少两个源操作数或源和结果操作数扩展到大于通用寄存器或数据路径宽度的宽度的宽度来提高处理器的性能。 本发明通过使用通用寄存器的内容来指定可以读取或写入数据的多个数据路径宽度的存储器地址,并且基本上大于处理器的数据路径宽度的操作数,以及 操作数的大小和形状。 此外,描述了用于实现这些指令的几个指令和装置,其如果操作数不限于通用寄存器的宽度和可访问数量,则获得性能优点。

    System and method for providing a wide operand architecture
    9.
    发明授权
    System and method for providing a wide operand architecture 失效
    用于提供广泛操作数体系结构的系统和方法

    公开(公告)号:US06295599B1

    公开(公告)日:2001-09-25

    申请号:US09382402

    申请日:1999-08-24

    IPC分类号: G06F1500

    摘要: The present invention provides a system and method for improving the performance of general purpose processors by expanding at least one source operand to a width greater than the width of either the general purpose register or the data path width. In addition, the present invention provides several classes of instructions which cannot be performed efficiently if the operands are limited to the width and accessible number of general purpose registers. The present invention provides operands which are substantially larger than the data path width of the processor by using a general purpose register to specify a memory address from which at least more than one, but typically several data path widths of data can be read. The present invention also provides for the efficient usage of a multiplier array that is fully used for high precision arithmetic, but is only partly used for other, lower precision operations.

    摘要翻译: 本发明提供一种用于通过将至少一个源操作数扩展到大于通用寄存器或数据路径宽度的宽度的宽度来提高通用处理器的性能的系统和方法。 此外,本发明提供若干种类的指令,如果操作数被限制在通用寄存器的宽度和可访问数量上,则不能有效地执行。 本发明通过使用通用寄存器来指定存储器地址来提供比处理器的数据路径宽度大得多的操作数,从而可以从其读取数据的至少一个但通常几个数据路径宽度。 本发明还提供了充分用于高精度算术的乘法器阵列的有效使用,但仅部分地用于其他较低精度的操作。