公开(公告)号：US20190096878A1

公开(公告)日：2019-03-28

申请号：US16094222

申请日：2017-05-24

Applicant: DENSO CORPORATION

Inventor： Takafumi ARAKAWA ,  Shigeki TAKAHASHI

IPC: H01L27/06 ,  H01L29/06 ,  H01L29/10 ,  H01L29/32 ,  H01L29/739

Abstract: semiconductor device has a semiconductor substrate including an IGBT region operating as an IGBT provided by an emitter layer, a base layer, a drift layer and a collector layer, and a diode region operating as a diode and provided by an anode layer, the drift layer and a cathode layer. The semiconductor substrate further includes a guard ring of a second conduction type, provided in a surface layer of the drift layer in a peripheral region surrounding a device region where the IGBT region and the diode region are adjacent to each other. The cathode layer and the guard ring are positioned such as to satisfy L/d≥1.5, where L is a minimum value of a distance between the cathode layer and the guard ring as projected to a plane parallel to a surface of the semiconductor substrate, and d is a thickness of the semiconductor substrate.

公开(公告)号：US20130168730A1

公开(公告)日：2013-07-04

申请号：US13719389

申请日：2012-12-19

Applicant: DENSO CORPORATION

Inventor： Youichi ASHIDA ,  Shigeki TAKAHASHI

IPC: H01L29/739

CPC classification number: H01L29/7394 ,  H01L29/0653 ,  H01L29/0696 ,  H01L29/405 ,  H01L29/42368 ,  H01L29/47 ,  H01L29/66325 ,  H01L29/7393

Abstract: A semiconductor device having a lateral insulated gate bipolar transistor includes a first conductivity type drift layer, a second conductivity type collector region formed in a surface portion of the drift layer, a second conductivity type channel layer formed in the surface portion of the drift layer, a first conductivity type emitter region formed in a surface portion of the channel layer, and a hole stopper region formed in the drift layer and located between the collector region and the emitter region. Holes are injected from the collector region into the drift layer and flow toward the emitter region through a hole path. The hole stopper region blocks a flow of the holes and narrows the hole path to concentrate the holes.

Abstract translation: 具有横向绝缘栅双极晶体管的半导体器件包括第一导电型漂移层，形成在漂移层的表面部分中的第二导电型集电极区，形成在漂移层的表面部分中的第二导电类型沟道层， 形成在沟道层的表面部分中的第一导电型发射极区域和形成在漂移层中并且位于集电极区域和发射极区域之间的空穴停止区域。 孔从集电区域注入漂移层，并通过孔路流向发射极区域。 孔停止区域阻挡孔的流动并使孔径变窄以集中孔。

公开(公告)号：US20190333987A1

公开(公告)日：2019-10-31

申请号：US16504858

申请日：2019-07-08

Applicant: DENSO CORPORATION

Inventor： Masanori MIYATA ,  Shigeki TAKAHASHI ,  Masakiyo SUMITOMO ,  Tomofusa SHIGA

IPC: H01L29/06 ,  H01L29/10 ,  H01L29/08 ,  H01L29/40 ,  H01L29/739

Abstract: A semiconductor device has an element part and an outer peripheral part, and a deep layer is formed in the outer peripheral part more deeply than a base layer. When a position of the deep layer closest to the element part is defined as a boundary position, a distance between the boundary position and a position closest to the outer peripheral part in an emitter region is defined as a first distance, and a distance between the boundary position and a position of an end of a collector layer is defined as a second distance, the first distance and the second distance are adjusted such that a carrier density in the outer peripheral part is lowered based on breakdown voltage in the outer peripheral part lowered by the deep layer.

公开(公告)号：US20170025410A1

公开(公告)日：2017-01-26

申请号：US15105664

申请日：2014-12-16

Applicant: DENSO CORPORATION

Inventor： Weitao CHENG ,  Shigeki TAKAHASHI

IPC: H01L27/07

CPC classification number: H01L27/0716 ,  H01L27/0727 ,  H01L29/0834 ,  H01L29/1087 ,  H01L29/1095 ,  H01L29/32 ,  H01L29/7397 ,  H01L29/78 ,  H01L29/861

Abstract: A semiconductor device includes: an IGBT section including a vertical IGBT; and a diode section arranged along the IGBT section and including a diode. The diode section includes a hole injection reduction layer having a first conductivity type and arranged in an upper layer portion of a drift layer, extending to a depth deeper than an anode region constituted by a second conductivity type region in the diode section, having an impurity concentration lower than an impurity concentration of the anode region and higher than an impurity concentration of the drift layer.

Abstract translation: 半导体器件包括：包括垂直IGBT的IGBT部; 以及沿IGBT部分配置并包括二极管的二极管部分。 二极管部分包括具有第一导电类型的空穴注入还原层，并且布置在漂移层的上层部分中，延伸到比由二极管部分中的第二导电类型区域构成的阳极区更深的深度，具有杂质 浓度低于阳极区域的杂质浓度，高于漂移层的杂质浓度。

公开(公告)号：US20170250269A1

公开(公告)日：2017-08-31

申请号：US15310244

申请日：2015-07-07

Applicant: DENSO CORPORATION

Inventor： Masakiyo SUMITOMO ,  Shigeki TAKAHASHI

IPC: H01L29/739 ,  H01L27/06 ,  H01L29/08 ,  H01L29/66 ,  H01L29/10

CPC classification number: H01L29/7397 ,  H01L27/04 ,  H01L27/0635 ,  H01L29/0696 ,  H01L29/0804 ,  H01L29/0821 ,  H01L29/0834 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/4236 ,  H01L29/66348 ,  H01L29/78 ,  H01L29/8613

Abstract: A semiconductor device includes: a drift layer; a base layer on the drift layer; a collector layer and a cathode layer opposite to the base layer; multiple trenches penetrating the base layer; a gate electrode in each trench; an emitter region in a surface portion of the base layer and contacting each trench; a first electrode connected to the base layer and the emitter region; and a second electrode connected to the collector layer and the cathode layer. The gate electrodes in a diode region of a semiconductor substrate are controlled independently from the gate electrodes in the IGBT region. A voltage not forming an inversion layer in the base layer is applied to the gate electrodes in the diode region.

公开(公告)号：US20160351708A1

公开(公告)日：2016-12-01

申请号：US15039564

申请日：2014-12-17

Applicant: DENSO CORPORATION

Inventor： Hiroshi KAMEOKA ,  Shigeki TAKAHASHI ,  Akira YAMADA ,  Atsushi KASAHARA

IPC: H01L29/78 ,  H01L27/092 ,  H01L29/66 ,  H01L29/08 ,  H01L29/10 ,  H01L29/40 ,  H01L27/12 ,  H01L29/06

CPC classification number: H01L29/7824 ,  H01L21/84 ,  H01L27/0922 ,  H01L27/1203 ,  H01L29/0692 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/42368 ,  H01L29/66681

Abstract: A semiconductor device includes a lateral transistor having: a semiconductor substrate including a drift layer; a first impurity layer in the drift layer; a channel layer in the drift layer; a second impurity layer in the channel layer; a separation insulation film on the drift layer between the channel layer and the first impurity layer; a gate insulation film on a channel region between the second impurity layer and the drift layer connected with the separation insulation film; a gate electrode on the gate insulation film and the separation insulation film; a first electrode connected with the first impurity layer; a second electrode connected with the second impurity layer and the channel layer; and a field plate on the separation insulation film between the gate electrode and the first electrode and connected with the first electrode. The field plate is larger than the gate electrode in a current direction.

Abstract translation: 一种半导体器件包括横向晶体管，其具有：包括漂移层的半导体衬底; 漂移层中的第一杂质层; 漂移层中的沟道层; 沟道层中的第二杂质层; 在沟道层和第一杂质层之间的漂移层上的分离绝缘膜; 在第二杂质层与与分离绝缘膜连接的漂移层之间的沟道区上的栅极绝缘膜; 栅绝缘膜上的栅电极和分离绝缘膜; 与第一杂质层连接的第一电极; 与第二杂质层和沟道层连接的第二电极; 以及在栅电极和第一电极之间的分离绝缘膜上的与第一电极连接的场板。 场板在电流方向上大于栅电极。

公开(公告)号：US20190252534A1

公开(公告)日：2019-08-15

申请号：US16393006

申请日：2019-04-24

Applicant: DENSO CORPORATION

Inventor： Koichi MURAKAWA ,  Masakiyo SUMITOMO ,  Shigeki TAKAHASHI

IPC: H01L29/739 ,  H01L29/861 ,  H01L29/10 ,  H01L27/07 ,  H01L29/06

Abstract: In a semiconductor device, a boundary area is between an IGBT region and a diode region. In other words, the boundary region is at a position adjacent to the diode region. The boundary region has a lower ratio of formation of a high-concentration P-type layer than the IGBT region. Accordingly, during recovery, hole injection from the IGBT region to the diode region can be inhibited. The reduced ratio of formation of the high-concentration P-type layer in the boundary region also reduces the amount of hole injection from the high-concentration P-type layer of the boundary region. Thus, it inhibits an increase in maximum reverse current during the recovery, and also decreases the carrier density on the cathode side to inhibit an increase in tail electrical current, so that the semiconductor device reduces switching loss and is highly resistant to recovery destruction.

公开(公告)号：US20140070271A1

公开(公告)日：2014-03-13

申请号：US14077510

申请日：2013-11-12

Applicant: Denso Corporation

Inventor： Shigeki TAKAHASHI ,  Norihito TOKURA ,  Satoshi SHIRAKI ,  Youichi ASHIDA ,  Akio NAKAGAWA

IPC: H01L29/739

CPC classification number: H01L29/7393 ,  H01L29/0696 ,  H01L29/0834 ,  H01L29/1095 ,  H01L29/405 ,  H01L29/7394

Abstract: A lateral insulated gate bipolar transistor includes a semiconductor substrate including a drift layer, a collector region, a channel layer, an emitter region, a gate insulating layer, a gate electrode, a collector electrode, an emitter electrode, and a barrier layer. The barrier layer is disposed along either side of the collector region and is located to a depth deeper than a bottom of the channel layer. The barrier layer has an impurity concentration that is higher than an impurity concentration of the drift layer. The barrier layer has a first end close to the collector region and a second end far from the collector region. The first end is located between the channel layer and the collector region, and the second end is located on the bottom of the channel layer.

Abstract translation: 横向绝缘栅双极晶体管包括包括漂移层，集电极区域，沟道层，发射极区域，栅极绝缘层，栅电极，集电极，发射极和阻挡层的半导体衬底。 阻挡层沿着集电极区域的两侧设置，并且位于比通道层的底部更深的深度。 阻挡层的杂质浓度高于漂移层的杂质浓度。 阻挡层具有靠近集电极区域的第一端和远离集电极区域的第二端。 第一端位于沟道层和集电极区之间，第二端位于沟道层的底部。

公开(公告)号：US20200227406A1

公开(公告)日：2020-07-16

申请号：US16833977

申请日：2020-03-30

Applicant: DENSO CORPORATION

Inventor： Koichi MURAKAWA ,  Shigeki TAKAHASHI ,  Masakiyo SUMITOMO

IPC: H01L27/06 ,  H01L29/06 ,  H01L29/08 ,  H01L29/10 ,  H01L29/861 ,  H01L29/739

Abstract: In a semiconductor device in which an IGBT region having an IGBT element and an FWD region having an FWD element are formed to a semiconductor substrate, a plurality of carrier injection layers electrically connected with a second electrode and configuring a PN junction with a field stop layer is disposed in a cathode layer. When an impurity concentration of the field stop layer is defined as Nfs [cm−3], and a length of a shortest portion of each of the plurality of carrier injection layers along a planar direction of the semiconductor substrate is defined as L1 [μm], the plurality of carrier injection layers satisfies a relationship of L1>6.8×10−18×Nfs+20.

公开(公告)号：US20180151558A1

公开(公告)日：2018-05-31

申请号：US15578318

申请日：2016-07-22

Applicant: DENSO CORPORATION

Inventor： Weitao CHENG ,  Shigeki TAKAHASHI ,  Masakiyo SUMITOMO

IPC: H01L27/06 ,  H01L29/739 ,  H01L29/861 ,  H01L29/10 ,  H01L29/06 ,  H01L29/423

CPC classification number: H01L27/0664 ,  H01L27/0727 ,  H01L29/0657 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/4236 ,  H01L29/739 ,  H01L29/7397 ,  H01L29/8613

Abstract: A semiconductor device includes a diode provided with: a drift layer being a first conductivity type; a cathode region being provided in a back face side of the drift layer and being the first conductivity type; a second conductivity type region provided in a surface layer part of the drift layer; multiple trenches dividing the second conductivity type region into pieces by being provided deeper than the second conductivity type region, and configuring an anode region; a gate insulation film provided in a surface of the trench; a gate electrode provided in a surface of the gate insulation film; an upper electrode electrically connected with the anode region; and a lower electrode electrically connected with the cathode region. A width between the trenches is narrowest in the drift layer is defined as a mesa width. The mesa width is set to be equal to or greater than 0.3 μm.