公开(公告)号：US5761109A

公开(公告)日：1998-06-02

申请号：US614537

申请日：1996-03-13

申请人： Daisaburo Takashima ,  Tsuneo Inaba ,  Yukihito Oowaki ,  Takashi Ohsawa ,  Shinichiro Shiratake

发明人： Daisaburo Takashima ,  Tsuneo Inaba ,  Yukihito Oowaki ,  Takashi Ohsawa ,  Shinichiro Shiratake

IPC分类号： G11C11/409 ,  G11C11/4097 ,  H01L21/8242 ,  H01L27/108 ,  G11C5/06

CPC分类号： G11C11/4097

摘要： A dynamic semiconductor memory device according to the present invention comprises at least first and second memory cell arrays having a plurality of memory cells selectively arranged at respective intersections of a plurality of word lines and a plurality of bit lines, a first sense amplifier section connected at an end of the first cell array to a plurality of bit line pairs formed by part of the plurality of bit lines of the first cell array, the plurality of bit line pairs having a folded bit line configuration, a second sense amplifier section connected to sets of bit line pairs, each formed by one of the remaining bit lines of the first cell array and one of part of the plurality of bit lines of the second cell array, the plurality of bit line pairs having an open bit line configuration, and a correction circuit for correcting the level of ease for reading data "0" and that of reading data "1".

摘要翻译： 根据本发明的动态半导体存储器件包括至少第一和第二存储器单元阵列，其具有选择性地布置在多个字线和多个位线的各个交点处的多个存储器单元，第一读出放大器部分连接在 第一单元阵列的一端到由第一单元阵列的多个位线的一部分形成的多个位线对，多个位线对具有折叠位线配置，第二读出放大器部分连接到组 的位线对，每个位线对由第一单元阵列的剩余位线之一和第二单元阵列的多个位线的一部分之一形成，多个位线对具有打开的位线配置，以及 用于校正读取数据“0”的容易程度的校正电路和读取数据“1”的校正电路。

公开(公告)号：US09608526B2

公开(公告)日：2017-03-28

申请号：US14371682

申请日：2012-04-27

申请人： Susumu Okura ,  Takashi Ohsawa

发明人： Susumu Okura ,  Takashi Ohsawa

IPC分类号： H02M3/335 ,  B60Q1/30 ,  B60L11/18 ,  H02J5/00

CPC分类号： H02M3/33507 ,  B60L11/1811 ,  B60L2210/10 ,  B60Q1/30 ,  H02J5/005 ,  H02J7/025 ,  H02J50/12 ,  H02M3/33576

摘要： A DC/DC converter 1 is configured to allow separation of a primary side constitution unit 3 and a secondary side constitution unit 4 of a transformer 2. A secondary side switching element FET 2 is provided in the secondary side constitution unit 4, and controls power supply to a load 12 by intermitting an output of a secondary winding L2. The primary side constitution unit 3 detects an electrical behavior of the primary side generated by the intermittent operation of the secondary side, and controls the power supplied from the primary winding L1 to the secondary winding L2 by operating the intermittent operation of the primary side switching element FET 1 such that a cycle or duty of the intermittent operation of the secondary side falls within a predetermined range.

公开(公告)号：US09125263B2

公开(公告)日：2015-09-01

申请号：US14004876

申请日：2011-08-05

申请人： Norikazu Tateishi ,  Takashi Ohsawa

发明人： Norikazu Tateishi ,  Takashi Ohsawa

IPC分类号： H05B41/00 ,  H05B33/08

CPC分类号： H05B33/0815 ,  H05B33/0809 ,  H05B33/0821 ,  H05B33/0827 ,  H05B33/083

摘要： An LED lighting device 1 lights LED blocks 4a and 4b which correspond to a plurality of functions of an illuminator such as headlights and are connected in series. The LED blocks 4a and 4b are connected in series with a current converting unit 5. While the LED blocks 4a and 4b are supplied with a current Ia from a single DC/DC converter unit 3, the LED block 4b is supplied with a current Ib that passes through conversion by the current converting unit 5 and that differs from the current Ia the DC/DC converter unit 3 outputs. Thus, the LED blocks 4a and 4b are each lit with appropriate brightness.

摘要翻译： LED照明装置1照亮与块灯等照明装置的多个功能对应的LED块4a，4b，并串联连接。 LED块4a和4b与电流转换单元5串联连接。当LED块4a和4b从单个DC / DC转换器单元3被提供有电流Ia时，向LED块4b提供电流Ib 其通过当前转换单元5的转换，并且与DC / DC转换器单元3输出的电流Ia不同。 因此，LED块4a和4b分别以适当的亮度点亮。

公开(公告)号：US20140368167A1

公开(公告)日：2014-12-18

申请号：US14371682

申请日：2012-04-27

申请人： Susumu Okura ,  Takashi Ohsawa

发明人： Susumu Okura ,  Takashi Ohsawa

IPC分类号： H02M3/335 ,  B60Q1/30 ,  B60L11/18

CPC分类号： H02M3/33507 ,  B60L11/1811 ,  B60L2210/10 ,  B60Q1/30 ,  H02J5/005 ,  H02J7/025 ,  H02J50/12 ,  H02M3/33576

摘要： A DC/DC converter 1 is configured to allow separation of a primary side constitution unit 3 and a secondary side constitution unit 4 of a transformer 2. A secondary side switching element FET 2 is provided in the secondary side constitution unit 4, and controls power supply to a load 12 by intermitting an output of a secondary winding L2. The primary side constitution unit 3 detects an electrical behavior of the primary side generated by the intermittent operation of the secondary side, and controls the power supplied from the primary winding L1 to the secondary winding L2 by operating the intermittent operation of the primary side switching element FET 1 such that a cycle or duty of the intermittent operation of the secondary side falls within a predetermined range.

摘要翻译： DC / DC转换器1被配置为允许分离变压器2的初级侧构造单元3和次级侧构造单元4.次级侧开关元件FET2设置在次级侧构成单元4中，并且控制功率 通过间接二次绕组L2的输出来供给到负载12。 初级侧构成单元3检测由次级侧的间歇动作产生的一次侧的电气行为，并且通过操作初级侧开关元件的间歇动作来控制从初级绕组L1向次级绕组L2供给的电力 FET 1，使得次级侧的间歇动作的周期或占空比落在预定范围内。

公开(公告)号：US08575839B2

公开(公告)日：2013-11-05

申请号：US13381876

申请日：2009-09-10

申请人： Yu Inoue ,  Takashi Ohsawa

发明人： Yu Inoue ,  Takashi Ohsawa

IPC分类号： B60Q1/04

CPC分类号： H05B33/0893

摘要： A headlamp LED lighting apparatus, which lights an LED block 2 having a plurality of LEDs connected in series, samples the output voltage of the headlamp LED lighting apparatus, calculates the average voltage during every prescribed interval, and has a storage unit for storing the average voltage during every prescribed interval calculated. A control circuit 8 compares the voltage variation in the average voltage during every prescribed interval read out of the storage unit with a prescribed threshold, and decides an LED failure of the LED block 2 from a result of the comparison.

摘要翻译： 照亮具有串联连接的多个LED的LED块2的前照灯LED照明装置对前照灯LED照明装置的输出电压进行采样，计算每个规定间隔期间的平均电压，并具有用于存储平均值的存储单元 计算每个规定间隔期间的电压。 控制电路8将从存储单元读出的每个规定间隔期间的平均电压的电压变化与规定的阈值进行比较，并根据比较结果判定LED块2的LED故障。

公开(公告)号：US20130027173A1

公开(公告)日：2013-01-31

申请号：US13639171

申请日：2010-07-26

申请人： Takashi Ohsawa

发明人： Takashi Ohsawa

IPC分类号： H01F27/28

CPC分类号： H01F27/325 ,  H01F27/2852 ,  H01F27/306

摘要： A columnar leg portion 54 of a first core 50 is inserted into a tubular portion 21 of a second bobbin 20 having a secondary winding 40 wound therearound and including a flange 22 at one end, and the columnar leg portion 54 of the first core 50 and the tubular portion 21 of the second bobbin 20 are inserted into a tubular portion 11 of a first bobbin 10 having a primary winding 30 wound therearound and having a flange 12 at one end, and a leading end 41 as the wind-beginning of the secondary winding 40 is pulled out to the outside of a transformer through the gap between the tubular portions 11 and 21.

摘要翻译： 第一芯50的柱状腿部54插入到具有卷绕在其周围的次级绕组40的第二线轴20的管状部分21中，并且在一端包括凸缘22，并且在第一芯50的柱状腿部54和 第二绕线筒20的管状部分21插入到第一线轴10的管状部分11中，第一线轴10具有卷绕在其上的初级绕组30，并且在一端具有凸缘12，并且作为次级的起始端的前端41 绕组40通过管状部分11和21之间的间隙被拉出到变压器的外部。

公开(公告)号：US08174920B2

公开(公告)日：2012-05-08

申请号：US12711613

申请日：2010-02-24

申请人： Fumiyoshi Matsuoka ,  Takashi Ohsawa

发明人： Fumiyoshi Matsuoka ,  Takashi Ohsawa

IPC分类号： G11C7/02 ,  G11C11/24

CPC分类号： G11C11/4091 ,  G11C11/4076 ,  G11C2207/002 ,  G11C2207/005 ,  G11C2211/4016

摘要： A memory includes a first and a second bit lines (BL); a first and a second sense nodes (SN); a first transfer gate between the 1st-BL and the 1st-SN; a second transfer gate (TG) between the 2nd-BL and the 2nd-SN; a latch circuit latching data to the 1st and 2nd-SN; a first data line (DQ) from the 1st-SN to outside; and a 2nd-DQ from the 2nd-SN to outside, wherein write data is transmitted from the 1st and 2nd-DQ to the 1st and 2nd-SN corresponding to selected cells before the 1st and 2nd-TG are set to be a conductive state, when writing data into the selected cells to be written out of the cells, and write data in the 1st and 2nd-SN corresponding to the selected cells are started to be written into the selected cells, when the 1st and 2nd-TG are set to be a conductive state.

摘要翻译： 存储器包括第一和第二位线（BL）; 第一和第二感测节点（SN）; 第一个BL和第一个SN之间的第一个传输门; 在第二BL和第二-SN之间的第二传输门（TG）; 锁存电路将数据锁存到第1和第2-SN; 第一个数据线（DQ）从第一个SN到外部; 以及从第2-SN到外部的第2-DQ，其中在将第1和第2 -TT设置为导通状态之前，将写入数据从第1和第2-DQ发送到对应于所选择的单元的第1和第2-SN 当将数据写入要被写入单元格的所选单元格中时，开始将与所选单元相对应的第1和第2-SN中的写入数据写入所选单元格，当设置第1和第2 -TG时 成为导电状态。

公开(公告)号：US20120086337A1

公开(公告)日：2012-04-12

申请号：US13378871

申请日：2009-09-10

申请人： Susumu Ohkura ,  Takashi Ohsawa

发明人： Susumu Ohkura ,  Takashi Ohsawa

IPC分类号： B60Q1/04

CPC分类号： B60Q11/005 ,  H05B33/0884

摘要： Right and left lighting devices 3-1 and 3-2 each include an abnormal event informing signal output circuit for outputting an abnormal event informing signal in response to an informing output of the control circuits 6-1 and 6-2. Each abnormal event informing signal output circuit has a circuit configuration that enables the abnormal event informing signal to be supplied to onboard equipment via a signal path common to the two devices.

摘要翻译： 左右照明装置3-1和3-2各自包括用于响应于控制电路6-1和6-2的通知输出而输出异常事件通知信号的异常事件通知信号输出电路。 每个异常事件通知信号输出电路都具有使异常事件通知信号经由两个设备共用的信号路径提供给车载设备的电路配置。

公开(公告)号：US20110280035A1

公开(公告)日：2011-11-17

申请号：US13144852

申请日：2009-11-04

申请人： Fumihiro Minami ,  Takashi Ohsawa

发明人： Fumihiro Minami ,  Takashi Ohsawa

IPC分类号： B60Q1/04

CPC分类号： B60Q1/0094 ,  F21S41/17 ,  F21S41/192

摘要： A lighting device for a headlamp light source includes an connector to be connected to cables for supplying power to the light source, and attached to the bottom of a headlamp case that houses a light source, wherein the output connector is formed such that when the lighting device is attached to the headlamp case, the bottom of a connection opening to which cables of the output connector are connected is disposed at a higher position than a bottom face inside the headlamp case.

摘要翻译： 一种用于前照灯光源的照明装置，包括：连接器，用于向光源提供电力的电缆，并连接到容纳光源的头灯箱的底部，其中，所述输出连接器形成为当照明 装置附接到前照灯外壳，连接到输出连接器的电缆的连接开口的底部设置在比前照灯外壳内的底面更高的位置。

公开(公告)号：US07839711B2

公开(公告)日：2010-11-23

申请号：US12352876

申请日：2009-01-13

申请人： Tomoki Higashi ,  Takashi Ohsawa

发明人： Tomoki Higashi ,  Takashi Ohsawa

IPC分类号： G11C7/00

CPC分类号： G11C11/404 ,  G11C11/406 ,  G11C2211/4016 ,  G11C2211/4065 ,  G11C2211/4068

摘要： A memory including; cells, wherein a refresh operation includes a first refresh and a second refresh, in the first refresh, a first potential higher than a gate potential in a retention is applied to the gate in a state having a source potential applied to the drain, and thereafter the gate potential in the retention is applied to the gate, thereby a first current passes to the cell, and in the second refresh, a second potential higher than a gate potential in the retention is applied to the gate, and a third potential higher than the gate potential in the retention is applied to the drain, thereby a second current passes to the cell, and a state of the cell is shifted to an equilibrium state in which amounts of the first and the second currents flowing during one cycle becomes substantially equal.

摘要翻译： 一个记忆包括 单元，其中刷新操作包括第一刷新和第二刷新，在具有施加到漏极的源极电位的状态下，将高于保持中的栅极电位的第一电位施加到栅极，之后 将保持中的栅极电位施加到栅极，由此第一电流流到电池，并且在第二次刷新中，将高于保持时的栅极电位的第二电位施加到栅极，并且第三电位高于 保留中的栅极电位被施加到漏极，由此第二电流流到电池，并且电池的状态转移到平衡状态，其中在一个周期期间流动的第一和第二电流的量变得基本相等 。