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1.发明申请BASE STRUCTURE FOR III-V SEMICONDUCTOR DEVICES ON GROUP IV SUBSTRATES AND METHOD OF FABRICATION THEREOF 审中-公开第IV组基板上的III-V半导体器件的基本结构及其制造方法公开(公告)号：US20100263707A1
公开(公告)日：2010-10-21
申请号：US12762256
申请日：2010-04-16
申请人： Dan Daeweon Cheong , Rafael Nathan Kleiman , Manuela Peter , Nicholas Komarnycky , Bradley Joseph Robinson , John Stewart Preston
发明人： Dan Daeweon Cheong , Rafael Nathan Kleiman , Manuela Peter , Nicholas Komarnycky , Bradley Joseph Robinson , John Stewart Preston
CPC分类号： C30B25/183 , C30B23/02 , C30B23/025 , C30B29/40 , C30B29/42 , C30B29/44 , H01L31/1852 , Y02E10/544
摘要： The structure presented herein provides a base structure for semiconductor devices, in particular for III-V semiconductor devices or for a combination of III-V and Group IV semiconductor devices. The fabrication method for a base substrate comprises a buffer layer, a nucleation layer, a Group IV substrate and possibly a dopant layer. There are, in a general aspect, two growth steps: firstly the growth of a lattice-matched III-V material on a Group IV substrate, followed by secondly the growth of a lattice-mismatched III-V layer. The first layer, called the nucleation layer, is lattice-matched or closely lattice-matched to the Group IV substrate while the following layer, the buffer layer, deposited on top of the nucleation layer, is lattice-mismatched to the nucleation layer. The nucleation layer can further be used as a dopant source to the Group IV substrate, creating a p-n junction in the substrate through diffusion. Alternatively a separate dopant layer may be introduced.
摘要翻译： 本文中给出的结构提供了半导体器件的基础结构，特别是对于III-V半导体器件或III-V和IV族半导体器件的组合。 基底衬底的制造方法包括缓冲层，成核层，第IV族衬底和可能的掺杂剂层。 在一般方面，存在两个生长步骤：首先在IV族衬底上生长晶格匹配的III-V材料，其次是晶格失配的III-V层的生长。 称为成核层的第一层与第IV族基质晶格匹配或紧密地晶格匹配，而沉积在成核层顶部的下一层缓冲层与成核层晶格失配。 成核层可以进一步用作第IV族衬底的掺杂剂源，通过扩散在衬底中产生p-n结。 或者，可以引入单独的掺杂剂层。
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公开(公告)号：US20110023949A1
公开(公告)日：2011-02-03
申请号：US12827422
申请日：2010-06-30
IPC分类号： H01L31/04
CPC分类号： H01L31/0687 , H01L31/0693 , H01L31/0725 , H01L31/073 , H01L31/0735 , H01L31/074 , H01L31/1836 , H01L31/1852 , Y02E10/543 , Y02E10/544
摘要： The present invention relates to a system and method for generating high efficiency silicon-based photovoltaic cells such as solar cells. The solar cell of the present invention comprises a silicon substrate layer, a first buffer layer disposed on a first surface of the silicon substrate layer and a second buffer layer disposed on the opposing surface of the silicon substrate layer and a third buffer layer disposed directly on the first buffer layer, the first and second buffer layers being lattice mismatched to the silicon substrate layer, and a first device layer disposed on the third buffer layer and a second device layer disposed on the second buffer layer, the first and second device layers comprising at least one of Sb-based compounds, III-V compounds and II-VI compo
摘要翻译： 本发明涉及一种用于产生高效率的硅基太阳能电池如太阳能电池的系统和方法。 本发明的太阳能电池包括硅衬底层，设置在硅衬底层的第一表面上的第一缓冲层和设置在硅衬底层的相对表面上的第二缓冲层和直接设置在硅衬底层上的第三缓冲层 第一缓冲层，第一和第二缓冲层与硅衬底层晶格失配，以及设置在第三缓冲层上的第一器件层和设置在第二缓冲层上的第二器件层，第一和第二器件层包括 Sb类化合物，III-V族化合物和II-VI族化合物中的至少一种
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公开(公告)号：US06417673B1
公开(公告)日：2002-07-09
申请号：US09196489
申请日：1998-11-19
IPC分类号： H01H3102
CPC分类号： G01Q60/30 , G01N27/24 , G01Q60/40 , Y10S977/854
摘要： In an imaging system for carrier profiling of a device structure, a doped semiconductor tip is utilized as an active dynamic sensing element for successively probing spaced-apart portions of the structure. At each probe position, the bias voltage applied between the tip and the structure is varied. While the bias voltage is being varied, a measurement is taken of the change in capacitance that occurs between the tip and the structure. These measurements provide an accurate high-resolution high-contrast image that is representative of the carrier profile of the probed portions of the device structure.
摘要翻译： 在用于装置结构的载体轮廓的成像系统中，掺杂的半导体尖端被用作用于连续探测结构的间隔开的部分的主动动态感测元件。 在每个探针位置，施加在尖端和结构之间的偏置电压是变化的。 当偏置电压变化时，测量在尖端和结构之间发生的电容变化。 这些测量提供了精确的高分辨率高对比度图像，其代表了装置结构的探测部分的载体轮廓。
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4.发明授权公开(公告)号：US06305226B1
公开(公告)日：2001-10-23
申请号：US09385745
申请日：1999-08-30
IPC分类号： G01N2900
CPC分类号： G01N29/06 , Y10S977/837 , Y10S977/849 , Y10S977/85 , Y10S977/852 , Y10S977/865
摘要： This invention relates to a method and apparatus for imaging acoustic fields in high-frequency acoustic resonators. More particularly, the invention is directed to a scanning RF mode microscope system that detects and monitors vibration of high frequency resonators that vibrate in the frequency range of approximately 1 MHz to 20 GHz. The system then maps with sub-Angstrom resolution vibration modes of such devices and obtains quantitative measurements of the piezoelectric properties of the materials.
摘要翻译： 本发明涉及用于对高频声谐振器中的声场进行成像的方法和装置。 更具体地，本发明涉及一种扫描RF模式显微镜系统，其检测和监测在大约1MHz至20GHz的频率范围内振动的高频谐振器的振动。 然后系统用这种器件的亚分辨率振动模式映射，并获得材料的压电特性的定量测量。
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5.发明授权Micropositioning devices, using single-crystal piezoelectric bodies, having at least two spatial degrees of freedom 失效使用具有至少两个空间自由度的单晶压电体的微定位装置
公开(公告)号：US5739624A
公开(公告)日：1998-04-14
申请号：US531140
申请日：1995-10-18
CPC分类号： H02N2/028
摘要： A piezoelectric micropositioning device includes, in one embodiment, four single-crystal piezoelectric bodies cut in the form of single-crystal parallel slabs from a single larger single crystal. Each of the single-crystal slabs has a separate electrode attached to an opposing major surface. One of the end faces of each of the slabs is fixed to a substrate; the other of the end faces is fixed to a holder. In response to voltages applied to the electrodes, the holder can be moved in two or three linearly independent directions, depending upon the applied voltages. In another embodiment, only a single piezoelectric body, preferably in the shape of a column and in conjunction with at least four electrodes located on the side surfaces of the column, is required for such motion in two or three directions.
摘要翻译： 在一个实施例中，压电微定位装置包括从单个更大的单晶切割成单晶平行板的形式的四个单晶压电体。 每个单晶板具有附接到相对主表面的单独电极。 每个板坯的一个端面固定在基板上; 另一个端面固定在支架上。 响应于施加到电极的电压，保持器可以根据所施加的电压以两个或三个线性独立的方向移动。 在另一个实施例中，在两个或三个方向上的这种运动仅需要单个压电体，优选地为柱状，并且与位于柱的侧表面上的至少四个电极结合。
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6.发明授权公开(公告)号：US06888658B2
公开(公告)日：2005-05-03
申请号：US10158807
申请日：2002-05-31
CPC分类号： B81B3/0086 , H02N1/002
摘要： A method and geometry for reducing drift in an electrostatically actuated device, the electrostatically actuated device including a dielectric material, for insulating conducting sections from a ground, the conducting sections being used to generate an electric field for controlling thereby the electrostatically actuated device includes, configuring a geometry of the dielectric material such that the electric field applied to exposed dielectric material comprises a substantially homogeneous electric field.
摘要翻译： 一种用于减少静电驱动装置中的漂移的方法和几何形状，所述静电致动装置包括用于将导电部分与地面绝缘的绝缘材料，所述导电部分用于产生用于由此静电致动装置控制的电场，包括： 介电材料的几何形状使得施加到暴露的电介质材料的电场包括基本均匀的电场。
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7.发明授权Electro-optic device including a buffer layer of transparent conductive material 有权电光装置包括透明导电材料的缓冲层公开(公告)号：US06480633B1
公开(公告)日：2002-11-12
申请号：US09335125
申请日：1999-06-17
申请人： Robert McLemore Fleming , Rafael Nathan Kleiman , Jueinai Raynien Kwo , John William Osenbach , Gordon Albert Thomas
发明人： Robert McLemore Fleming , Rafael Nathan Kleiman , Jueinai Raynien Kwo , John William Osenbach , Gordon Albert Thomas
IPC分类号： G02F1035
CPC分类号： G02F1/035 , G02F1/225 , G02F2201/07
摘要： An electro-optic device comprising an electro-optic crystal substrate, an optical waveguide path in the crystal adjacent the substrate surface and an electrode spaced from the surface by a buffer layer is provided with enhanced operating stability by forming the buffer layer of a transparent electronically conductive material. Preferred buffer materials are electronically conductive gallium-indium-oxide and electronically conductive zinc-indium-tin-oxide.
摘要翻译： 包括电光晶体基板的电光装置，与基板表面相邻的晶体中的光波导路径和通过缓冲层与表面隔开的电极通过形成透明电子的缓冲层而具有增强的操作稳定性 导电材料。 优选的缓冲材料是电子导电的镓铟氧化物和电子导电的锌 - 铟 - 锡氧化物。
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