公开(公告)号：US20060134911A1

公开(公告)日：2006-06-22

申请号：US10905230

申请日：2004-12-22

申请人： Darryl Restaino ,  Donald Canaperi ,  Judith Rubino ,  Sean Smith ,  Richard Henry ,  James Fluegel ,  Mahadevaiyer Krishnan

发明人： Darryl Restaino ,  Donald Canaperi ,  Judith Rubino ,  Sean Smith ,  Richard Henry ,  James Fluegel ,  Mahadevaiyer Krishnan

IPC分类号： H01L21/44

CPC分类号： H01L21/288 ,  C23C18/1241 ,  C23C18/1607 ,  C23C18/1608 ,  C23C18/1844 ,  C23C18/50 ,  H01L21/76849 ,  H01L21/76874 ,  H05K3/244 ,  H05K2203/0716 ,  H05K2203/072

摘要： A method to electrolessly plate a CoWP alloy on copper in a reproducible manner that is effective for a manufacturable process. In the method, a seed layer of palladium (Pd) is deposited on the copper by an aqueous seeding solution of palladium acetate, acetic acid and chloride. Thereafter, a complexing solution is applied to remove any Pd ions which are adsorbed on surfaces other than the copper. Finally, a plating solution of cobalt (Co), tungsten (W) and phosphorous (P) is applied to the copper so as to deposit a layer of CoWP on the Pd seed and copper.

摘要翻译： 一种以可再生的方式对铜上的CoWP合金进行无电镀的方法，该方法对于可制造的工艺是有效的。 在该方法中，通过乙酸钯，乙酸和氯化物的水性接种溶液将铜（Pd）种子层沉积在铜上。 此后，应用络合溶液以除去吸附在除铜之外的表面上的任何Pd离子。 最后，将铜（Co），钨（W）和磷（P）的电镀溶液施加到铜上，以便在Pd种子和铜上沉积CoWP层。

公开(公告)号：US20070215842A1

公开(公告)日：2007-09-20

申请号：US11751788

申请日：2007-05-22

申请人： Darryl Restaino ,  Donald Canaperi ,  Judith Rubino ,  Sean Smith ,  Richard Henry ,  James Fluegel ,  Mahadevaiyer Krishnan

发明人： Darryl Restaino ,  Donald Canaperi ,  Judith Rubino ,  Sean Smith ,  Richard Henry ,  James Fluegel ,  Mahadevaiyer Krishnan

IPC分类号： H01B1/02

CPC分类号： H01L21/288 ,  C23C18/1241 ,  C23C18/1607 ,  C23C18/1608 ,  C23C18/1844 ,  C23C18/50 ,  H01L21/76849 ,  H01L21/76874 ,  H05K3/244 ,  H05K2203/0716 ,  H05K2203/072

摘要： An aqueous seeding solution of palladium acetate, acetic acid and chloride.

摘要翻译： 乙酸钯，乙酸和氯化钠的水溶液接种溶液。

公开(公告)号：US20050186778A1

公开(公告)日：2005-08-25

申请号：US11104764

申请日：2005-04-12

申请人： Donald Canaperi ,  Timothy Dalton ,  Stephen Gates ,  Mahadevaiyer Krishnan ,  Satya Nitta ,  Sampath Purushothaman ,  Sean Smith

发明人： Donald Canaperi ,  Timothy Dalton ,  Stephen Gates ,  Mahadevaiyer Krishnan ,  Satya Nitta ,  Sampath Purushothaman ,  Sean Smith

IPC分类号： H01L21/768 ,  H01L21/00 ,  H01L21/4763

CPC分类号： H01L21/76807 ,  H01L21/76834 ,  H01L21/76835 ,  H01L21/76885 ,  H01L2924/0002 ,  H01L2924/00

摘要： A structure incorporates very low dielectric constant (k) insulators with copper wiring to achieve high performance interconnects. The wiring is supported by a relatively durable low k dielectric such as SiLk or SiO2 and a very low k and less-robust gap fill dielectric is disposed in the remainder of the structure, so that the structure combines a durable layer for strength with a very low k dielectric for interconnect electrical performance.

摘要翻译： 一个结构包含非常低的介电常数（k）绝缘体与铜布线，以实现高性能互连。 布线由相对耐用的低k电介质（例如SiLk或SiO 2）支撑，并且在该结构的其余部分中布置非常低的k和较不稳定的间隙填充电介质，使得该结构将耐用层与强度非常相似 低k电介质用于互连电气性能。

公开(公告)号：US06825075B2

公开(公告)日：2004-11-30

申请号：US10757214

申请日：2004-01-14

申请人： Kevin S. Petrarca ,  Donald Canaperi ,  Mahadevaiyer Krishnan ,  Kenneth Jay Stein ,  Richard P. Volant

发明人： Kevin S. Petrarca ,  Donald Canaperi ,  Mahadevaiyer Krishnan ,  Kenneth Jay Stein ,  Richard P. Volant

IPC分类号： H01L218242

CPC分类号： H01L21/76849 ,  H01L21/76834 ,  H01L21/7684 ,  H01L28/60

摘要： A method is described for fabricating an encapsulated metal structure in a feature formed in a substrate. The sidewalls and bottom of the feature are covered by a barrier layer and the feature is filled with metal, preferably by electroplating. A recess is formed in the metal, and an additional barrier layer is deposited, covering the top surface of the metal and contacting the first barrier layer. The additional barrier layer is planarized, preferably by chemical-mechanical polishing. The method may be used in fabricating a MIM capacitor, with the encapsulated metal structure serving as the lower plate of the capacitor. A second substrate layer is deposited on the top surface of the substrate, with an opening overlying the encapsulated metal structure. A dielectric layer is deposited in the opening, covering the encapsulated metal structure at the bottom thereof. An additional layer, serving as the upper plate of the capacitor, is deposited to cover the dielectric layer and to fill the opening. The dielectric layer and the additional layer are planarized, preferably by CMP.

摘要翻译： 描述了一种在衬底中形成的特征中制造封装金属结构的方法。 特征的侧壁和底部被阻挡层覆盖，并且该特征被金属填充，优选地通过电镀。 在金属中形成凹部，并且沉积附加的阻挡层，覆盖金属的顶表面并与第一阻挡层接触。 优选通过化学机械抛光将附加阻挡层平坦化。 该方法可用于制造MIM电容器，其中封装的金属结构用作电容器的下板。 第二衬底层沉积在衬底的顶表面上，具有覆盖封装的金属结构的开口。 介电层沉积在开口中，覆盖其底部的封装金属结构。 作为电容器的上板的附加层被沉积以覆盖电介质层并填充开口。 介电层和附加层优选通过CMP平坦化。

公开(公告)号：US20060163083A1

公开(公告)日：2006-07-27

申请号：US11038236

申请日：2005-01-21

申请人： Panayotis Andricacos ,  Donald Canaperi ,  Emanuel Cooper ,  John Cotte ,  Hariklia Deligianni ,  Laertis Economikos ,  Daniel Edelstein ,  Silvia Franz ,  Balasubramanian Pranatharthiharan ,  Mahadevaiyer Krishnan ,  Andrew Mansson ,  Erick Walton ,  Alan West ,  Caliopi Andricacos

发明人： Panayotis Andricacos ,  Donald Canaperi ,  Emanuel Cooper ,  John Cotte ,  Hariklia Deligianni ,  Laertis Economikos ,  Daniel Edelstein ,  Silvia Franz ,  Balasubramanian Pranatharthiharan ,  Mahadevaiyer Krishnan ,  Andrew Mansson ,  Erick Walton ,  Alan West ,  Caliopi Andricacos

IPC分类号： B23H3/00

CPC分类号： C25F3/02 ,  B23H5/08 ,  C09G1/04 ,  H01L21/32125

摘要： Methods and compositions for electro-chemical-mechanical polishing (e-CMP) of silicon chip interconnect materials, such as copper, are provided. The methods include the use of compositions according to the invention in combination with pads having various configurations.

摘要翻译： 提供了诸如铜之类的硅芯片互连材料的电化学机械抛光（e-CMP）的方法和组合物。 所述方法包括使用根据本发明的组合物与具有各种构型的垫组合。

公开(公告)号：US06756624B2

公开(公告)日：2004-06-29

申请号：US10409010

申请日：2003-04-07

申请人： Kevin S. Petrarca ,  Donald Canaperi ,  Mahadevaiyer Krishnan ,  Kenneth Jay Stein ,  Richard P. Volant

发明人： Kevin S. Petrarca ,  Donald Canaperi ,  Mahadevaiyer Krishnan ,  Kenneth Jay Stein ,  Richard P. Volant

IPC分类号： H01L27108

CPC分类号： H01L21/76849 ,  H01L21/76834 ,  H01L21/7684 ,  H01L28/60

摘要： A method is described for fabricating an encapsulated metal structure in a feature formed in a substrate. The sidewalls and bottom of the feature are covered by a barrier layer and the feature is filled with metal, preferably by electroplating. A recess is formed in the metal, and an additional barrier layer is deposited, covering the top surface of the metal and contacting the first barrier layer. The additional barrier layer is planarized, preferably by chemical-mechanical polishing. The method may be used in fabricating a MIM capacitor, with the encapsulated metal structure serving as the lower plate of the capacitor. A second substrate layer is deposited on the top surface of the substrate, with an opening overlying the encapsulated metal structure. A dielectric layer is deposited in the opening, covering the encapsulated metal structure at the bottom thereof. An additional layer, serving as the upper plate of the capacitor, is deposited to cover the dielectric layer and to fill the opening. The dielectric layer and the additional layer are planarized, preferably by CMP.

摘要翻译： 描述了一种在衬底中形成的特征中制造封装金属结构的方法。 特征的侧壁和底部被阻挡层覆盖，并且该特征被金属填充，优选地通过电镀。 在金属中形成凹部，并且沉积附加的阻挡层，覆盖金属的顶表面并与第一阻挡层接触。 优选通过化学机械抛光将附加阻挡层平坦化。 该方法可用于制造MIM电容器，其中封装的金属结构用作电容器的下板。 第二衬底层沉积在衬底的顶表面上，具有覆盖封装的金属结构的开口。 介电层沉积在开口中，覆盖其底部的封装金属结构。 作为电容器的上板的附加层被沉积以覆盖电介质层并填充开口。 介电层和附加层优选通过CMP平坦化。

公开(公告)号：US06597068B2

公开(公告)日：2003-07-22

申请号：US10034862

申请日：2001-12-28

申请人： Kevin S. Petrarca ,  Donald Canaperi ,  Mahadevaiyer Krishnan ,  Kenneth Jay Stein ,  Richard P. Volant

发明人： Kevin S. Petrarca ,  Donald Canaperi ,  Mahadevaiyer Krishnan ,  Kenneth Jay Stein ,  Richard P. Volant

IPC分类号： H01L2348

CPC分类号： H01L21/76849 ,  H01L21/76834 ,  H01L21/7684 ,  H01L28/60

摘要： A method is described for fabricating an encapsulated metal structure in a feature formed in a substrate. The sidewalls and bottom of the feature are covered by a barrier layer and the feature is filled with metal, preferably by electroplating. A recess is formed in the metal, and an additional barrier layer is deposited, covering the top surface of the metal and contacting the first barrier layer. The additional barrier layer is planarized, preferably by chemical-mechanical polishing. The method may be used in fabricating a MIM capacitor, with the encapsulated metal structure serving as the lower plate of the capacitor. A second substrate layer is deposited on the top surface of the substrate, with an opening overlying the encapsulated metal structure. A dielectric layer is deposited in the opening, covering the encapsulated metal structure at the bottom thereof. An additional layer, serving as the upper plate of the capacitor, is deposited to cover the dielectric layer and to fill the opening. The dielectric layer and the additional layer are planarized, preferably by CMP.

公开(公告)号：US06368953B1

公开(公告)日：2002-04-09

申请号：US09567466

申请日：2000-05-09

申请人： Kevin S. Petrarca ,  Donald Canaperi ,  Mahadevaiyer Krishnan ,  Kenneth Jay Stein ,  Richard P. Volant

发明人： Kevin S. Petrarca ,  Donald Canaperi ,  Mahadevaiyer Krishnan ,  Kenneth Jay Stein ,  Richard P. Volant

IPC分类号： H01L214763

CPC分类号： H01L21/76849 ,  H01L21/76834 ,  H01L21/7684 ,  H01L28/60

摘要： A method is described for fabricating an encapsulated metal structure in a feature formed in a substrate. The sidewalls and bottom of the feature are covered by a barrier layer and the feature is filled with metal, preferably by electroplating. A recess is formed in the metal, and an additional barrier layer is deposited, covering the top surface of the metal and contacting the first barrier layer. The additional barrier layer is planarized, preferably by chemical-mechanical polishing. The method may be used in fabricating a MIM capacitor, with the encapsulated metal structure serving as the lower plate of the capacitor. A second substrate layer is deposited on the top surface of the substrate, with an opening overlying the encapsulated metal structure. A dielectric layer is deposited in the opening, covering the encapsulated metal structure at the bottom thereof. An additional layer, serving as the upper plate of the capacitor, is deposited to cover the dielectric layer and to fill the opening. The dielectric layer and the additional layer are planarized, preferably by CMP.

摘要翻译： 描述了一种在衬底中形成的特征中制造封装金属结构的方法。 特征的侧壁和底部被阻挡层覆盖，并且该特征被金属填充，优选地通过电镀。 在金属中形成凹部，并且沉积附加的阻挡层，覆盖金属的顶表面并与第一阻挡层接触。 优选通过化学机械抛光将附加阻挡层平坦化。 该方法可用于制造MIM电容器，其中封装的金属结构用作电容器的下板。 第二衬底层沉积在衬底的顶表面上，具有覆盖封装的金属结构的开口。 介电层沉积在开口中，覆盖其底部的封装金属结构。 作为电容器的上板的附加层被沉积以覆盖电介质层并填充开口。 介电层和附加层优选通过CMP平坦化。

公开(公告)号：US20060255480A1

公开(公告)日：2006-11-16

申请号：US10908480

申请日：2005-05-13

申请人： Jon Casey ,  Michael Berger ,  Leena Buchwalter ,  Donald Canaperi ,  Raymond Horton ,  Anurag Jain ,  Eric Perfecto ,  James Tornello

发明人： Jon Casey ,  Michael Berger ,  Leena Buchwalter ,  Donald Canaperi ,  Raymond Horton ,  Anurag Jain ,  Eric Perfecto ,  James Tornello

IPC分类号： H01L23/29

CPC分类号： H01L23/147 ,  H01L21/486 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/49827 ,  H01L2924/0002 ,  H01L2924/00

摘要： Sealing a via using a soventless, low viscosity, high temperature stable polymer or a high solids content polymer solution of low viscosity, where the polymeric material is impregnated within the via at an elevated temperature. A supply chamber is introduced to administer the polymeric material at an elevated temperature, typically at a temperature high enough to liquefy the polymeric material. The polymeric material is introduced through heated supply lines under force from a pump, piston, or a vacuum held within said supply chamber.

摘要翻译： 使用无粘性，低粘度，高温稳定的聚合物或低粘度的高固含量聚合物溶液密封通孔，其中聚合物材料在高温下浸渍在通孔内。 引入供应室以在升高的温度下施用聚合物材料，通常在高至足以液化聚合物材料的温度下。 聚合物材料通过来自泵，活塞或保持在所述供应室内的真空的力的加热供应管线引入。