公开(公告)号：US20170301472A1

公开(公告)日：2017-10-19

申请号：US15447857

申请日：2017-03-02

Applicant: Delphi Technologies, Inc.

Inventor： Manuel Ray Fairchild ,  Ralph S. Taylor ,  David W. Ihms ,  Celine Wk Wong

IPC: H01G4/32 ,  H01G4/12 ,  H01G4/008

CPC classification number: H01G4/32 ,  H01G4/008 ,  H01G4/1227 ,  H01G4/1245 ,  H01G4/224 ,  H01G13/02

Abstract: A ceramic-wound-capacitor includes a first-electrically-conductive-layer, a dielectric-layer, a second-electrically-conductive-layer, and a protective-coating. The dielectric-layer is formed of lead-lanthanum-zirconium-titanate (PLZT). The protective-coating has a thickness of less than ten micrometers (10 μm) and provides electrical isolation between the first-electrically-conductive-layer and the second-electrically-conductive-layer of the ceramic-wound-capacitor. A method for fabricating the ceramic-wound-capacitor includes the steps of feeding a carrier-strip, depositing a sacrificial layer, depositing a first-electrically-conductive-layer, depositing a dielectric-layer, and depositing a second-electrically-conductive-layer to form an arrangement coupled to the carrier-strip by the sacrificial-layer, separating the arrangement from the carrier-strip and sacrificial-layer, creating an exposed-surface of the first-electrically-conductive-layer, applying a protective-coating to the exposed-surface of the first-electrically-conductive-layer, winding the arrangement with the protective-coating to form a ceramic-wound-capacitor, where the protective-coating is in direct contact with the first-electrically-conductive-layer and the second-electrically-conductive-layer of the ceramic-wound-capacitor.

公开(公告)号：US09230739B2

公开(公告)日：2016-01-05

申请号：US14065837

申请日：2013-10-29

Applicant: DELPHI TECHNOLOGIES, INC. ,  UCHICAGO ARGONNE, LLC, OPERATOR OF ARGONNE NATIONAL LABORATORY

Inventor： M. Ray Fairchild ,  Ralph S. Taylor ,  Carl W. Berlin ,  Celine W K Wong ,  Beihai Ma ,  Uthamalingam Balachandran

IPC: H01G4/12 ,  H01G4/30 ,  H01G4/33 ,  H01G4/38 ,  H01G4/008 ,  H01L49/02

CPC classification number: H01G4/1245 ,  H01G4/008 ,  H01G4/012 ,  H01G4/30 ,  H01G4/306 ,  H01G4/33 ,  H01G4/38 ,  H01L28/55 ,  Y10T29/417

Abstract: A lead-lanthanum-zirconium-titanate (PLZT) capacitor on a substrate formed of glass. The first metallization layer is deposited on a top side of the substrate to form a first electrode. The dielectric layer of PLZT is deposited over the first metallization layer. The second metallization layer deposited over the dielectric layer to form a second electrode. The glass substrate is advantageous as glass is compatible with an annealing process used to form the capacitor.

Abstract translation: 在由玻璃形成的基板上的铅 - 镧 - 钛酸锆（PLZT）电容器。 第一金属化层沉积在基板的顶侧上以形成第一电极。 PLZT的介电层沉积在第一金属化层上。 第二金属化层沉积在电介质层上以形成第二电极。 玻璃基板是有利的，因为玻璃与用于形成电容器的退火工艺相容。

公开(公告)号：US09299496B2

公开(公告)日：2016-03-29

申请号：US14873532

申请日：2015-10-02

Applicant: Delphi Technologies, Inc. ,  UChicago Argonne, LLC

Inventor： Manuel Ray Fairchild ,  Ralph S. Taylor ,  Carl W. Berlin ,  Celine Wk Wong ,  Beihai Ma ,  Uthamalingam Balachandran

IPC: H01G4/12 ,  H01G4/30 ,  H01G4/008 ,  H01G4/012

CPC classification number: H01G4/1245 ,  H01G4/008 ,  H01G4/012 ,  H01G4/30 ,  H01G4/306 ,  H01G4/33 ,  H01G4/38 ,  H01L28/55 ,  Y10T29/417

Abstract: A lead-lanthanum-zirconium-titanate (PLZT) capacitor on a substrate formed of glass. The first metallization layer is deposited on a top side of the substrate to form a first electrode. The dielectric layer of PLZT is deposited over the first metallization layer. The second metallization layer deposited over the dielectric layer to form a second electrode. The glass substrate is advantageous as glass is compatible with an annealing process used to form the capacitor.

公开(公告)号：US09153380B2

公开(公告)日：2015-10-06

申请号：US13752441

申请日：2013-01-29

Applicant: DELPHI TECHNOLOGIES, INC.

Inventor： Ralph S. Taylor ,  John D. Myers ,  William J. Baney

IPC: H01G4/06 ,  H01G4/32 ,  H01G2/18 ,  H01G4/015 ,  H01G4/30 ,  H01G13/00 ,  H01G4/12

CPC classification number: H01G2/18 ,  H01G4/015 ,  H01G4/1218 ,  H01G4/308 ,  H01G13/00 ,  Y02T10/7022 ,  Y10T29/43 ,  Y10T29/435 ,  Y10T29/49124 ,  Y10T29/49155 ,  Y10T156/1168

Abstract: A ceramic short circuit resistant capacitor that is bendable and/or shapeable to provide a multiple layer capacitor that is extremely compact and amenable to desirable geometries. The capacitor that exhibits a benign failure mode in which a multitude of discrete failure events result in a gradual loss of capacitance. Each event is a localized event in which localized heating causes an adjacent portion of one or both of the electrodes to vaporize, physically cleaning away electrode material from the failure site. A first metal electrode, a second metal electrode, and a ceramic dielectric layer between the electrodes are thin enough to be formed in a serpentine-arrangement with gaps between the first electrode and the second electrode that allow venting of vaporized electrode material in the event of a benign failure.

Abstract translation: 一种陶瓷短路电容器，其是可弯曲和/或可成形的，以提供非常紧凑并且适合于所需几何形状的多层电容器。 表现出良性故障模式的电容器，其中许多离散故障事件导致电容逐渐损失。 每个事件是本地化事件，其中局部加热导致一个或两个电极的相邻部分蒸发，从故障部位物理地清除电极材料。 电极之间的第一金属电极，第二金属电极和陶瓷电介质层足够薄以形成为蛇形结构，在第一电极和第二电极之间具有间隙，允许在发生蒸发的电极材料时排出蒸发的电极材料 良性失败。

公开(公告)号：US08754512B1

公开(公告)日：2014-06-17

申请号：US13705269

申请日：2012-12-05

Applicant: Delphi Technologies, Inc.

Inventor： Ralph S. Taylor ,  Steven E. Staller

IPC: H01L23/495

CPC classification number: H01L23/49568 ,  H01L23/36 ,  H01L23/3735 ,  H01L23/49531 ,  H01L23/49562 ,  H01L23/49575 ,  H01L23/49844 ,  H01L24/05 ,  H01L24/06 ,  H01L24/08 ,  H01L24/80 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/06181 ,  H01L2224/08225 ,  H01L2224/80012 ,  H01L2224/80203 ,  H01L2224/80424 ,  H01L2224/80444 ,  H01L2224/80447 ,  H01L2224/80805 ,  H01L2924/01322 ,  H01L2924/10253 ,  H01L2924/10272 ,  H01L2924/1033 ,  H01L2924/12036 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/3511 ,  H01L2924/00

Abstract: An electronic device assembly that includes a die and a substrate, and optionally a lead frame and a heat spreader. The die is characterized as an electronic device in die form, and has a polished die region. The substrate has a polished substrate region in direct contact with the polished die region. The polished die region and the polished substrate region have surface finishes effective to attach the die to the substrate by way of an atomic bond. The lead-frame has a polished lead-frame region, and the heat spreader has a polished heat spreader region. These polished regions may also be attached to the polished die region or the polished substrate region by way of an atomic bond.

Abstract translation: 一种包括管芯和衬底以及可选地引线框架和散热器的电子器件组件。 模具的特征在于以模具形式的电子设备，并且具有抛光的模具区域。 衬底具有与抛光的裸片区域直接接触的抛光衬底区域。 抛光的裸片区域和抛光的衬底区域具有有效的通过原子键将裸片附接到衬底的表面光洁度。 引线框架具有抛光的引线框架区域，散热器具有抛光的散热器区域。 这些抛光区域也可以通过原子键连接到抛光的裸片区域或抛光的衬底区域。

公开(公告)号：US20160027580A1

公开(公告)日：2016-01-28

申请号：US14873532

申请日：2015-10-02

Applicant: Delphi Technologies, Inc. ,  UChicago Argonne, LLC

Inventor： Manuel Ray Fairchild ,  Ralph S. Taylor ,  Carl W. Berlin ,  Celine Wk Wong ,  Beihai Ma ,  Uthamalingam Balachandran

IPC: H01G4/12 ,  H01G4/008 ,  H01G4/012 ,  H01G4/30

CPC classification number: H01G4/1245 ,  H01G4/008 ,  H01G4/012 ,  H01G4/30 ,  H01G4/306 ,  H01G4/33 ,  H01G4/38 ,  H01L28/55 ,  Y10T29/417

Abstract: A lead-lanthanum-zirconium-titanate (PLZT) capacitor on a substrate formed of glass. The first metallization layer is deposited on a top side of the substrate to form a first electrode. The dielectric layer of PLZT is deposited over the first metallization layer. The second metallization layer deposited over the dielectric layer to form a second electrode. The glass substrate is advantageous as glass is compatible with an annealing process used to form the capacitor.

Abstract translation: 在由玻璃形成的基板上的铅 - 镧 - 钛酸锆（PLZT）电容器。 第一金属化层沉积在基板的顶侧上以形成第一电极。 PLZT的介电层沉积在第一金属化层上。 第二金属化层沉积在电介质层上以形成第二电极。 玻璃基板是有利的，因为玻璃与用于形成电容器的退火工艺相容。