公开(公告)号：US20240222298A1

公开(公告)日：2024-07-04

申请号：US18091583

申请日：2022-12-30

申请人： Intel Corporation

发明人： Jeremy D. Ecton ,  Brandon Christian Marin ,  Srinivas V. Pietambaram ,  Suddhasattwa Nad ,  Gang Duan

IPC分类号： H01L23/00 ,  H01L23/498 ,  H01L23/538 ,  H01L25/065

CPC分类号： H01L24/08 ,  H01L23/49816 ,  H01L23/5381 ,  H01L24/05 ,  H01L24/80 ,  H01L25/0655 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/08225 ,  H01L2224/80444 ,  H01L2224/8049 ,  H01L2924/0105 ,  H01L2924/0132

摘要： Technologies for die recycling for high yield packaging is disclosed. In the illustrative embodiment, a release layer is deposited on one or more dies. The release layer includes conductive pads and a dielectric layer. Both the conductive pads and the dielectric layer have melting points between a temperature at which the die assembly will be processed and a temperature at which the die may sustain damage. One or more layers such as redistribution layers are deposited on the release layer. If a fault is discovered in the redistribution layers, the die assembly can be heated up past the melting point of the release layer, allowing the die to be removed. The die can then be cleaned and recycled for another packaging attempt.

公开(公告)号：US20230154877A1

公开(公告)日：2023-05-18

申请号：US17702812

申请日：2022-03-24

申请人： Industrial Technology Research Institute

发明人： Yu-Ming Peng ,  Chien-Chou Tseng ,  Chih-Chia Chang ,  Kuan-Chu Wu ,  Yu-Lin Hsu

IPC分类号： H01L23/00 ,  H01L33/62 ,  H01L23/13 ,  H01L21/66

CPC分类号： H01L24/06 ,  H01L33/62 ,  H01L24/05 ,  H01L23/13 ,  H01L24/08 ,  H01L24/16 ,  H01L24/80 ,  H01L24/81 ,  H01L22/20 ,  H01L2224/05111 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05611 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05686 ,  H01L2924/0549 ,  H01L2224/0569 ,  H01L2224/05693 ,  H01L24/13 ,  H01L2224/13186 ,  H01L2224/1319 ,  H01L2224/13193 ,  H01L2224/0603 ,  H01L2224/08238 ,  H01L2224/16227 ,  H01L2224/80411 ,  H01L2224/80424 ,  H01L2224/80439 ,  H01L2224/80444 ,  H01L2224/80447 ,  H01L2224/80455 ,  H01L2224/80486 ,  H01L2224/8049 ,  H01L2224/80493 ,  H01L2224/81411 ,  H01L2224/81424 ,  H01L2224/81439 ,  H01L2224/81444 ,  H01L2224/81447 ,  H01L2224/81455 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L23/145

摘要： An electronic device includes a substrate, an electronic component, a first interposing layer and a second interposing layer. The substrate is non-planar and the substrate includes a first substrate pad and a second substrate pad. The electronic component includes a first component pad and a second component pad corresponding to the first substrate pad and the second substrate pad respectively. When the first component pad contacts the first substrate pad, a height difference exists between the second component pad and the second substrate pad. The first interposing layer connects between the first component pad and the first substrate pad. The second interposing layer connects between the second component pad and the second substrate pad. A thickness difference between the first interposing layer and the second interposing layer is 0.5 to 1 time the height difference.

公开(公告)号：US08497432B2

公开(公告)日：2013-07-30

申请号：US12561526

申请日：2009-09-17

申请人： Nobuaki Hashimoto

发明人： Nobuaki Hashimoto

IPC分类号： H05K1/16

CPC分类号： H05K3/305 ,  G02F1/13458 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/08 ,  H01L24/27 ,  H01L24/29 ,  H01L24/30 ,  H01L24/32 ,  H01L24/80 ,  H01L24/83 ,  H01L2224/02311 ,  H01L2224/02313 ,  H01L2224/02373 ,  H01L2224/02377 ,  H01L2224/02379 ,  H01L2224/02381 ,  H01L2224/0239 ,  H01L2224/0331 ,  H01L2224/0332 ,  H01L2224/03515 ,  H01L2224/0361 ,  H01L2224/0362 ,  H01L2224/03831 ,  H01L2224/0519 ,  H01L2224/05191 ,  H01L2224/05548 ,  H01L2224/05551 ,  H01L2224/05553 ,  H01L2224/05556 ,  H01L2224/05572 ,  H01L2224/05582 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05671 ,  H01L2224/05684 ,  H01L2224/0569 ,  H01L2224/05691 ,  H01L2224/061 ,  H01L2224/06155 ,  H01L2224/06505 ,  H01L2224/08058 ,  H01L2224/08238 ,  H01L2224/09055 ,  H01L2224/2731 ,  H01L2224/2732 ,  H01L2224/27515 ,  H01L2224/2761 ,  H01L2224/27825 ,  H01L2224/27831 ,  H01L2224/29008 ,  H01L2224/29011 ,  H01L2224/29013 ,  H01L2224/29017 ,  H01L2224/29023 ,  H01L2224/29082 ,  H01L2224/29101 ,  H01L2224/29124 ,  H01L2224/29144 ,  H01L2224/29147 ,  H01L2224/2919 ,  H01L2224/29191 ,  H01L2224/29563 ,  H01L2224/2957 ,  H01L2224/29582 ,  H01L2224/29624 ,  H01L2224/29644 ,  H01L2224/29647 ,  H01L2224/29655 ,  H01L2224/29664 ,  H01L2224/29666 ,  H01L2224/29671 ,  H01L2224/29684 ,  H01L2224/301 ,  H01L2224/30155 ,  H01L2224/30505 ,  H01L2224/32058 ,  H01L2224/32238 ,  H01L2224/33055 ,  H01L2224/80194 ,  H01L2224/80203 ,  H01L2224/80385 ,  H01L2224/80424 ,  H01L2224/80444 ,  H01L2224/80447 ,  H01L2224/80488 ,  H01L2224/8085 ,  H01L2224/80862 ,  H01L2224/8088 ,  H01L2224/80902 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83193 ,  H01L2224/83203 ,  H01L2224/83385 ,  H01L2224/834 ,  H01L2224/83424 ,  H01L2224/83444 ,  H01L2224/83447 ,  H01L2224/83488 ,  H01L2224/8385 ,  H01L2224/83862 ,  H01L2224/8388 ,  H01L2224/83902 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/19041 ,  H05K3/325 ,  H05K2201/0367 ,  H05K2201/0382 ,  H05K2201/091 ,  H05K2201/10674 ,  H05K2201/10977 ,  Y02P70/613 ,  H01L2924/00014 ,  H01L2924/01023 ,  H01L2924/00 ,  H01L2924/01022 ,  H01L2924/01028

摘要： An electronic component mounting structure includes a substrate having a terminal, an electronic component having an active face, an electrode that is formed on the active face of the electronic component, a base resin that is formed on the active face, a first opening that is formed at the base resin to expose the electrode, and a conductive film that covers a part of a top surface of the base resin and that is electrically connected to the electrode via the first opening. Because the base resin is bonded to the substrate, the bonding strength between the conductive film located on the top surface of the base resin and the terminal of the substrate is increased. Therefore, the reliability of electrical connection between the conductive film and the terminal is improved.

摘要翻译： 一种电子部件安装结构，包括具有端子的基板，具有有源面的电子部件，形成在电子部件的主动面上的电极，形成在主动面上的基体树脂，第一开口部 形成在所述基体树脂上以露出所述电极;以及导电膜，其覆盖所述基础树脂的顶表面的一部分并且经由所述第一开口电连接到所述电极。 由于基体树脂与基板结合，所以位于基体树脂的上表面的导电膜与基板的端子之间的接合强度提高。 因此，提高了导电膜和端子之间的电连接的可靠性。

公开(公告)号：US08481364B2

公开(公告)日：2013-07-09

申请号：US12900016

申请日：2010-10-07

申请人： Tzu-Yuan Chao ,  Chia-Wei Liang ,  Yu-Ting Cheng

发明人： Tzu-Yuan Chao ,  Chia-Wei Liang ,  Yu-Ting Cheng

IPC分类号： H01L23/12 ,  H01L21/302 ,  H01L21/50

CPC分类号： H01L23/52 ,  H01L21/02068 ,  H01L21/32134 ,  H01L21/4846 ,  H01L21/6835 ,  H01L23/4985 ,  H01L23/5222 ,  H01L23/66 ,  H01L24/05 ,  H01L24/08 ,  H01L24/80 ,  H01L24/95 ,  H01L2221/68345 ,  H01L2221/68381 ,  H01L2223/6627 ,  H01L2224/05005 ,  H01L2224/05155 ,  H01L2224/05541 ,  H01L2224/05644 ,  H01L2224/08238 ,  H01L2224/80006 ,  H01L2224/8001 ,  H01L2224/80203 ,  H01L2224/80444 ,  H01L2224/80895 ,  H01L2224/95 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/07811 ,  H01L2924/1461 ,  H01L2924/00014 ,  H01L2224/80 ,  H01L2924/00

摘要： A fabrication method for integrating chip(s) onto a flexible substrate in forming a flexible micro-system. The method includes a low-temperature flip-chip and a wafer-level fabrication process. Using the low-temperature flip-chip technique, the chip is bonded metallically onto the flexible substrate. To separate the flexible substrate from the substrate, etching is used to remove the sacrificial layer underneath the flexible substrate. The instant disclosure applies standardized micro-fabrication process for integrating chip(s) onto the flexible substrate. Without using special materials or fabrication procedures, the instant disclosure offers a cost-effective fabrication method for flexible micro-systems.

摘要翻译： 一种用于将芯片集成到柔性基板上以形成柔性微系统的制造方法。 该方法包括低温​​倒装芯片和晶片级制造工艺。 使用低温倒装芯片技术，将芯片金属结合到柔性基板上。 为了将柔性基板与基板分离，使用蚀刻去除柔性基板下方的牺牲层。 本公开使用用于将芯片集成到柔性基板上的标准化微制造工艺。 本发明不使用特殊材料或制造工艺，为柔性微系统提供了具有成本效益的制造方法。

公开(公告)号：US20180190579A1

公开(公告)日：2018-07-05

申请号：US15854728

申请日：2017-12-26

申请人： InnoLux Corporation

发明人： Hsueh-Hsuan Chou ,  Chia-Chieh Fan ,  Cheng-Chi Wang ,  Kuan-Jen Wang

IPC分类号： H01L23/498 ,  H01L21/66 ,  H01L23/00 ,  H01L21/48 ,  H01L21/683 ,  H01L21/78 ,  H01L21/56 ,  H01L23/31

CPC分类号： H01L23/49838 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/78 ,  H01L22/14 ,  H01L22/32 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/49816 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L24/97 ,  H01L2221/68345 ,  H01L2221/68359 ,  H01L2221/68381 ,  H01L2224/05611 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13155 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/16238 ,  H01L2224/16502 ,  H01L2224/80411 ,  H01L2224/80444 ,  H01L2224/80455 ,  H01L2224/81005 ,  H01L2224/81411 ,  H01L2224/81444 ,  H01L2224/81455 ,  H01L2224/81805 ,  H01L2224/97 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/37001 ,  H01L2224/81 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/013

摘要： A package structure includes a redistribution layer, at least one bonding electrode, and a mounting layer. The redistribution layer has a first surface, a second surface disposed opposite to the first surface, and at least one sidewall connected to the first surface and the second surface. The bonding electrode is disposed on the first surface of the redistribution layer. The mounting layer is disposed on the second surface of the redistribution layer. The mounting layer includes a plurality of conductive pads spaced apart from each other, wherein at least one of the conductive pads is exposed by the sidewall of the redistribution layer.

公开(公告)号：US08754512B1

公开(公告)日：2014-06-17

申请号：US13705269

申请日：2012-12-05

申请人： Delphi Technologies, Inc.

发明人： Ralph S. Taylor ,  Steven E. Staller

IPC分类号： H01L23/495

CPC分类号： H01L23/49568 ,  H01L23/36 ,  H01L23/3735 ,  H01L23/49531 ,  H01L23/49562 ,  H01L23/49575 ,  H01L23/49844 ,  H01L24/05 ,  H01L24/06 ,  H01L24/08 ,  H01L24/80 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/06181 ,  H01L2224/08225 ,  H01L2224/80012 ,  H01L2224/80203 ,  H01L2224/80424 ,  H01L2224/80444 ,  H01L2224/80447 ,  H01L2224/80805 ,  H01L2924/01322 ,  H01L2924/10253 ,  H01L2924/10272 ,  H01L2924/1033 ,  H01L2924/12036 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/3511 ,  H01L2924/00

摘要： An electronic device assembly that includes a die and a substrate, and optionally a lead frame and a heat spreader. The die is characterized as an electronic device in die form, and has a polished die region. The substrate has a polished substrate region in direct contact with the polished die region. The polished die region and the polished substrate region have surface finishes effective to attach the die to the substrate by way of an atomic bond. The lead-frame has a polished lead-frame region, and the heat spreader has a polished heat spreader region. These polished regions may also be attached to the polished die region or the polished substrate region by way of an atomic bond.

摘要翻译： 一种包括管芯和衬底以及可选地引线框架和散热器的电子器件组件。 模具的特征在于以模具形式的电子设备，并且具有抛光的模具区域。 衬底具有与抛光的裸片区域直接接触的抛光衬底区域。 抛光的裸片区域和抛光的衬底区域具有有效的通过原子键将裸片附接到衬底的表面光洁度。 引线框架具有抛光的引线框架区域，散热器具有抛光的散热器区域。 这些抛光区域也可以通过原子键连接到抛光的裸片区域或抛光的衬底区域。

公开(公告)号：US20140151864A1

公开(公告)日：2014-06-05

申请号：US13705269

申请日：2012-12-05

申请人： Ralph S. TAYLOR ,  Steven E. STALLER

发明人： Ralph S. TAYLOR ,  Steven E. STALLER

IPC分类号： H01L23/495

CPC分类号： H01L23/49568 ,  H01L23/36 ,  H01L23/3735 ,  H01L23/49531 ,  H01L23/49562 ,  H01L23/49575 ,  H01L23/49844 ,  H01L24/05 ,  H01L24/06 ,  H01L24/08 ,  H01L24/80 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/06181 ,  H01L2224/08225 ,  H01L2224/80012 ,  H01L2224/80203 ,  H01L2224/80424 ,  H01L2224/80444 ,  H01L2224/80447 ,  H01L2224/80805 ,  H01L2924/01322 ,  H01L2924/10253 ,  H01L2924/10272 ,  H01L2924/1033 ,  H01L2924/12036 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/3511 ,  H01L2924/00

摘要： An electronic device assembly that includes a die and a substrate, and optionally a lead frame and a heat spreader. The die is characterized as an electronic device in die form, and has a polished die region. The substrate has a polished substrate region in direct contact with the polished die region. The polished die region and the polished substrate region have surface finishes effective to attach the die to the substrate by way of an atomic bond. The lead-frame has a polished lead-frame region, and the heat spreader has a polished heat spreader region. These polished regions may also be attached to the polished die region or the polished substrate region by way of an atomic bond.

摘要翻译： 一种包括管芯和衬底以及可选地引线框架和散热器的电子器件组件。 模具的特征在于以模具形式的电子设备，并且具有抛光的模具区域。 衬底具有与抛光的裸片区域直接接触的抛光衬底区域。 抛光的裸片区域和抛光的衬底区域具有有效的通过原子键将裸片附接到衬底的表面光洁度。 引线框架具有抛光的引线框架区域，散热器具有抛光的散热器区域。 这些抛光区域也可以通过原子键连接到抛光的裸片区域或抛光的衬底区域。

公开(公告)号：US20130234314A1

公开(公告)日：2013-09-12

申请号：US13869215

申请日：2013-04-24

申请人： NATIONAL CHIAO TUNG UNIVERSITY

发明人： TZU-YUAN CHAO ,  CHIA-WEI LIANG ,  YU-TING CHENG

IPC分类号： H01L23/52

CPC分类号： H01L23/52 ,  H01L21/02068 ,  H01L21/32134 ,  H01L21/4846 ,  H01L21/6835 ,  H01L23/4985 ,  H01L23/5222 ,  H01L23/66 ,  H01L24/05 ,  H01L24/08 ,  H01L24/80 ,  H01L24/95 ,  H01L2221/68345 ,  H01L2221/68381 ,  H01L2223/6627 ,  H01L2224/05005 ,  H01L2224/05155 ,  H01L2224/05541 ,  H01L2224/05644 ,  H01L2224/08238 ,  H01L2224/80006 ,  H01L2224/8001 ,  H01L2224/80203 ,  H01L2224/80444 ,  H01L2224/80895 ,  H01L2224/95 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/07811 ,  H01L2924/1461 ,  H01L2924/00014 ,  H01L2224/80 ,  H01L2924/00

摘要： A fabrication method for integrating chip(s) onto a flexible substrate in forming a flexible micro-system. The method includes a low-temperature flip-chip and a wafer-level fabrication process. Using the low-temperature flip-chip technique, the chip is bonded metallically onto the flexible substrate. To separate the flexible substrate from the substrate, etching is used to remove the sacrificial layer underneath the flexible substrate. The instant disclosure applies standardized micro-fabrication process for integrating chip(s) onto the flexible substrate. Without using special materials or fabrication procedures, the instant disclosure offers a cost-effective fabrication method for flexible micro-systems.

摘要翻译： 一种用于将芯片集成到柔性基板上以形成柔性微系统的制造方法。 该方法包括低温​​倒装芯片和晶片级制造工艺。 使用低温倒装芯片技术，将芯片金属结合到柔性基板上。 为了将柔性基板与基板分离，使用蚀刻去除柔性基板下方的牺牲层。 本公开使用用于将芯片集成到柔性基板上的标准化微制造工艺。 本发明不使用特殊材料或制造工艺，为柔性微系统提供了具有成本效益的制造方法。

公开(公告)号：US20240332247A1

公开(公告)日：2024-10-03

申请号：US18613110

申请日：2024-03-22

申请人： NICHIA CORPORATION

发明人： Hiroaki KAGEYAMA ,  Yuka IMADA ,  Hiroki HANAOKA

IPC分类号： H01L23/00 ,  H01L21/66 ,  H01L25/075 ,  H01L33/40 ,  H01L33/62

CPC分类号： H01L24/80 ,  H01L22/22 ,  H01L24/05 ,  H01L24/08 ,  H01L24/95 ,  H01L25/0753 ,  H01L33/40 ,  H01L33/62 ,  H01L2224/05644 ,  H01L2224/08225 ,  H01L2224/80052 ,  H01L2224/80201 ,  H01L2224/80444 ,  H01L2224/95 ,  H01L2924/12041 ,  H01L2933/0066

摘要： A method of manufacturing a light emitting device includes preparing a plurality of first elements including first bonding parts and a wiring substrate including a plurality of second bonding parts. The method further includes placing the first elements on the wiring substrate by bonding the first bonding parts and the second bonding parts under first bonding conditions, and bonding the first bonding parts and the second bonding parts under second bonding conditions by placing a buffer sheet on the first elements and applying pressure on the first elements via the buffer sheet towards the wiring substrate. The bonding conducted under the second bonding conditions is performed multiple times.

公开(公告)号：US20240105699A1

公开(公告)日：2024-03-28

申请号：US17934409

申请日：2022-09-22

申请人： Apple Inc.

发明人： Sanjay Dabral ,  SivaChandra Jangam

IPC分类号： H01L25/18 ,  H01L23/00 ,  H01L23/31 ,  H01L23/48 ,  H01L23/498

CPC分类号： H01L25/18 ,  H01L23/3128 ,  H01L23/481 ,  H01L23/49827 ,  H01L24/08 ,  H01L24/05 ,  H01L24/80 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/08225 ,  H01L2224/80379 ,  H01L2224/80444 ,  H01L2224/80447

摘要： A system in package structure and method of fabrication using wafer reconstitution are described. In an embodiment a 3D system includes a mid-layer interposer a first package level underneath the mid-layer interposer and a second package level over the mid-layer interposer. Second package level components can be bonded to the mid-layer interposer with metal-metal bonds and optionally dielectric-dielectric bonds, while the first package level components can be bonded to the mid-layer interposer with dielectric-dielectric and optionally metal-metal bonds.