公开(公告)号：US5528083A

公开(公告)日：1996-06-18

申请号：US317900

申请日：1994-10-04

申请人： Deviprasad Malladi ,  Eric L. Bogatin ,  Bahram Zand

发明人： Deviprasad Malladi ,  Eric L. Bogatin ,  Bahram Zand

IPC分类号： H01G4/33 ,  H01L21/60 ,  H01L21/822 ,  H01L23/495 ,  H01L23/50 ,  H01L23/64 ,  H01L27/04 ,  H01L23/12 ,  H01L23/14 ,  H01L23/522

CPC分类号： H01L24/06 ,  H01L23/49589 ,  H01L23/50 ,  H01L23/642 ,  H01L24/49 ,  H01L2223/6611 ,  H01L2224/04042 ,  H01L2224/05552 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05624 ,  H01L2224/32145 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48245 ,  H01L2224/48247 ,  H01L2224/48253 ,  H01L2224/48472 ,  H01L2224/48624 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L24/45 ,  H01L24/48 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19107 ,  H01L2924/30107 ,  Y10S257/924

摘要： An integrated circuit chip and flat capacitor assembly are connected with short bonding wires to reduce electrical noise. A flat chip capacitor is coupled to the chip and includes a first electrode, a second electrode and a dielectric layer disposed between the electrodes. The ground and power bonding pads of an integrated circuit chip are coupled to a number of terminals arranged in a row near the outer edge of the capacitor, where each of the terminals is coupled to one of the electrodes. The terminals of the capacitor are connected to a number of package leads of a lead frame or a other integrated circuit package. The invention includes embodiments in which the chip is placed on top of the capacitor, the capacitor is placed on top of the chip, and a flex circuit of a micro ball grid array is placed on a capacitor which is positioned on a chip.

摘要翻译： 集成电路芯片和扁平电容器组件与短接合线连接以减少电气噪声。 扁平电容器耦合到芯片，并且包括设置在电极之间的第一电极，第二电极和介电层。 集成电路芯片的接地和电源接合焊盘被耦合到靠近电容器的外边缘排列成行的多个端子，其中每个端子耦合到电极中的一个。 电容器的端子连接到引线框架或其他集成电路封装的多个封装引线。 本发明包括其中将芯片放置在电容器顶部上的实施例，电容器放置在芯片的顶部，微球栅阵列的柔性电路放置在位于芯片上的电容器上。