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    Shield contacts in a shielded gate MOSFET
    1.
    发明授权
    Shield contacts in a shielded gate MOSFET 有权
    屏蔽栅极MOSFET中的屏蔽触点

    公开(公告)号：US08338285B2

    公开(公告)日：2012-12-25

    申请号：US13104006

    申请日：2011-05-09

    申请人： Dixie Dunn ,  Paul Thorup ,  Dean E. Probst ,  Michael D. Gruenhagen

    发明人： Dixie Dunn ,  Paul Thorup ,  Dean E. Probst ,  Michael D. Gruenhagen

    IPC分类号： H01L21/28

    CPC分类号： H01L29/7813 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/4238 ,  H01L29/66143 ,  H01L29/66348 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7397 ,  H01L29/7806 ,  H01L29/872 ,  H01L29/8725

    摘要： A semiconductor structure is formed as follows. Trenches are formed in a semiconductor region and a shield electrode is formed in each trench. Gate electrodes are formed in a portion of the trenches that form an active region. Each gate electrode is disposed over the shield electrode and is isolated from the shield electrode by an inter-electrode dielectric. An interconnect layer is formed extending over the trenches. The interconnect layer is isolated from the gate electrodes in the active region by a dielectric layer and contacts the shield electrodes in a shield contact region separate from the active region. The interconnect layer contacts mesa surfaces between adjacent trenches in the shield contact region.

    摘要翻译： 如下形成半导体结构。 沟槽形成在半导体区域中，并且在每个沟槽中形成屏蔽电极。 栅电极形成在形成有源区的沟槽的一部分中。 每个栅电极设置在屏蔽电极之上，并且通过电极间电介质与屏蔽电极隔离。 形成在沟槽上延伸的互连层。 互连层通过介电层与有源区域中的栅电极隔离，并且在与有源区分离的屏蔽接触区域中与屏蔽电极接触。 互连层接触屏蔽接触区域中相邻沟槽之间的台面。

    Shield contacts in a shielded gate MOSFET
    2.
    发明授权
    Shield contacts in a shielded gate MOSFET 有权
    屏蔽栅极MOSFET中的屏蔽触点

    公开(公告)号：US07952141B2

    公开(公告)日：2011-05-31

    申请号：US12509379

    申请日：2009-07-24

    申请人： Dixie Dunn ,  Paul Thorup ,  Dean E. Probst ,  Michael D. Gruenhagen

    发明人： Dixie Dunn ,  Paul Thorup ,  Dean E. Probst ,  Michael D. Gruenhagen

    IPC分类号： H01L29/78

    CPC分类号： H01L29/7813 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/4238 ,  H01L29/66143 ,  H01L29/66348 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7397 ,  H01L29/7806 ,  H01L29/872 ,  H01L29/8725

    摘要： A semiconductor structure comprises an active region comprising trenches extending into a semiconductor region. Each trench includes a shield electrode and a gate electrode. The semiconductor structure also comprises a shield contact region adjacent to the active region. The shield contact region comprises at least one contact trench extending into the semiconductor region. The shield electrode from at least one of the trenches in the active region extends along a length of the contact trench. The semiconductor structure also comprises an interconnect layer extending over the active region and the shield contact region. In the active region the interconnect layer is isolated from the gate electrode in each trench by a dielectric layer and contacts mesa surfaces of the semiconductor region adjacent to the trenches. In the shield contact region the interconnect layer contacts the shield electrode and the mesa surfaces of the semiconductor region adjacent to the contact trench.

    摘要翻译： 半导体结构包括包括延伸到半导体区域中的沟槽的有源区。 每个沟槽包括屏蔽电极和栅电极。 半导体结构还包括与有源区相邻的屏蔽接触区。 屏蔽接触区域包括延伸到半导体区域中的至少一个接触沟槽。 有源区域中至少一个沟槽的屏蔽电极沿接触沟槽的长度延伸。 半导体结构还包括在有源区域和屏蔽接触区域上延伸的互连层。 在有源区域中，互连层通过介电层与每个沟槽中的栅电极隔离，并接触与沟槽相邻的半导体区域的台面表面。 在屏蔽接触区域中，互连层与屏蔽电极和与接触沟槽相邻的半导体区域的台面表面接触。

    SHIELD CONTACTS IN A SHIELDED GATE MOSFET
    3.
    发明申请
    SHIELD CONTACTS IN A SHIELDED GATE MOSFET 有权
    屏蔽栅MOSFET中的屏蔽触点

    公开(公告)号：US20110275208A1

    公开(公告)日：2011-11-10

    申请号：US13104006

    申请日：2011-05-09

    申请人： Dixie Dunn ,  Paul Thorup ,  Dean E. Probst ,  Michael D. Gruenhagen

    发明人： Dixie Dunn ,  Paul Thorup ,  Dean E. Probst ,  Michael D. Gruenhagen

    IPC分类号： H01L21/28

    CPC分类号： H01L29/7813 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/4238 ,  H01L29/66143 ,  H01L29/66348 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7397 ,  H01L29/7806 ,  H01L29/872 ,  H01L29/8725

    摘要： A semiconductor structure is formed as follows. Trenches are formed in a semiconductor region and a shield electrode is formed in each trench. Gate electrodes are formed in a portion of the trenches that form an active region. Each gate electrode is disposed over the shield electrode and is isolated from the shield electrode by an inter-electrode dielectric. An interconnect layer is formed extending over the trenches. The interconnect layer is isolated from the gate electrodes in the active region by a dielectric layer and contacts the shield electrodes in a shield contact region separate from the active region. The interconnect layer contacts mesa surfaces between adjacent trenches in the shield contact region.

    摘要翻译： 如下形成半导体结构。 沟槽形成在半导体区域中，并且在每个沟槽中形成屏蔽电极。 栅电极形成在形成有源区的沟槽的一部分中。 每个栅电极设置在屏蔽电极之上，并且通过电极间电介质与屏蔽电极隔离。 形成在沟槽上延伸的互连层。 互连层通过介电层与有源区域中的栅电极隔离，并且在与有源区分离的屏蔽接触区域中与屏蔽电极接触。 互连层接触屏蔽接触区域中相邻沟槽之间的台面。

    Shield Contacts in a Shielded Gate MOSFET
    4.
    发明申请
    Shield Contacts in a Shielded Gate MOSFET 有权
    屏蔽栅极MOSFET中的屏蔽触点

    公开(公告)号：US20110018059A1

    公开(公告)日：2011-01-27

    申请号：US12509379

    申请日：2009-07-24

    申请人： Dixie Dunn ,  Paul Thorup ,  Dean E. Probst ,  Michael D. Gruenhagen

    发明人： Dixie Dunn ,  Paul Thorup ,  Dean E. Probst ,  Michael D. Gruenhagen

    IPC分类号： H01L29/78 ,  H01L21/28

    CPC分类号： H01L29/7813 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/4238 ,  H01L29/66143 ,  H01L29/66348 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7397 ,  H01L29/7806 ,  H01L29/872 ,  H01L29/8725

    摘要： A semiconductor structure comprises an active region comprising trenches extending into a semiconductor region. Each trench includes a shield electrode and a gate electrode. The semiconductor structure also comprises a shield contact region adjacent to the active region. The shield contact region comprises at least one contact trench extending into the semiconductor region. The shield electrode from at least one of the trenches in the active region extends along a length of the contact trench. The semiconductor structure also comprises an interconnect layer extending over the active region and the shield contact region. In the active region the interconnect layer is isolated from the gate electrode in each trench by a dielectric layer and contacts mesa surfaces of the semiconductor region adjacent to the trenches. In the shield contact region the interconnect layer contacts the shield electrode and the mesa surfaces of the semiconductor region adjacent to the contact trench.

    摘要翻译： 半导体结构包括包括延伸到半导体区域中的沟槽的有源区。 每个沟槽包括屏蔽电极和栅电极。 半导体结构还包括与有源区相邻的屏蔽接触区。 屏蔽接触区域包括延伸到半导体区域中的至少一个接触沟槽。 有源区域中至少一个沟槽的屏蔽电极沿接触沟槽的长度延伸。 半导体结构还包括在有源区域和屏蔽接触区域上延伸的互连层。 在有源区域中，互连层通过介电层与每个沟槽中的栅电极隔离，并接触与沟槽相邻的半导体区域的台面表面。 在屏蔽接触区域中，互连层与屏蔽电极和与接触沟槽相邻的半导体区域的台面表面接触。

    Method of forming high density trench FET with integrated Schottky diode
    5.
    发明授权
    Method of forming high density trench FET with integrated Schottky diode 有权
    用集成肖特基二极管形成高密度沟槽FET的方法

    公开(公告)号：US07713822B2

    公开(公告)日：2010-05-11

    申请号：US12249889

    申请日：2008-10-10

    申请人： Paul Thorup ,  Ashok Challa ,  Bruce Douglas Marchant

    发明人： Paul Thorup ,  Ashok Challa ,  Bruce Douglas Marchant

    IPC分类号： H01L29/76 ,  H01L29/94

    CPC分类号： H01L29/7813 ,  H01L29/0696 ,  H01L29/407 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7806

    摘要： A method of forming a monolithically integrated trench FET and Schottky diode includes the following steps. Two trenches are formed extending through an upper silicon layer and terminating within a lower silicon layer. The upper and lower silicon layers have a first conductivity type. First and second silicon regions of a second conductivity type are formed in the upper silicon layer between the pair of trenches. A third silicon region of the first conductivity type is formed extending into the first and second silicon regions between the pair of trenches such that remaining lower portions of the first and second silicon regions form two body regions separated by a portion of the upper silicon layer. A silicon etch is performed to form a contact opening extending through the first silicon region such that outer portions of the first silicon region remain, the outer portions forming source regions. An interconnect layer is formed filling the contact opening so as to electrically contact the source regions and the portion of the upper silicon layer. The interconnect layer electrically contacts the second silicon region so as to form a Schottky contact therebetween.

    摘要翻译： 形成单片集成沟槽FET和肖特基二极管的方法包括以下步骤。 两个沟槽形成为延伸穿过上硅层并终止于下硅层内。 上硅层和下硅层具有第一导电类型。 第二导电类型的第一和第二硅区域形成在一对沟槽之间的上硅层中。 形成第一导电类型的第三硅区域延伸到该对沟槽之间的第一和第二硅区域中，使得第一和第二硅区域的剩余下部分形成由上部硅层的一部分隔开的两个主体区域。 执行硅蚀刻以形成延伸穿过第一硅区域的接触开口，使得保留第一硅区域的外部部分，形成源区域的外部部分。 形成了填充接触开口的互连层，以便与源区和上硅层的部分电接触。 互连层与第二硅区电接触，以便在它们之间形成肖特基接触。

    Method for Forming a Shielded Gate Trench FET with the Shield and Gate Electrodes Being Connected Together
    6.
    发明申请
    Method for Forming a Shielded Gate Trench FET with the Shield and Gate Electrodes Being Connected Together 有权
    用于形成屏蔽栅极沟道FET的方法，其中屏蔽和栅电极连接在一起

    公开(公告)号：US20080064168A1

    公开(公告)日：2008-03-13

    申请号：US11938583

    申请日：2007-11-12

    申请人： Nathan Kraft ,  Christopher Kocon ,  Paul Thorup

    发明人： Nathan Kraft ,  Christopher Kocon ,  Paul Thorup

    IPC分类号： H01L21/336

    CPC分类号： H01L29/7813 ,  H01L21/823437 ,  H01L27/088 ,  H01L29/407 ,  H01L29/42368 ,  H01L29/66734 ,  H01L29/7811

    摘要： A method of forming a field effect transistor includes the following steps. A trench is formed in a semiconductor region, and a shield dielectric layer lining lower sidewalls and a bottom surface of the trench is formed. A shield electrode is formed in a lower portion of the trench, and a dielectric layer is formed along upper trench sidewalls and over the shield electrode. A gate electrode is formed in the trench over the shield electrode, and an interconnect layer connecting the gate electrode and the shield electrode is formed.

    摘要翻译： 形成场效应晶体管的方法包括以下步骤。 在半导体区域中形成沟槽，并形成衬套下侧壁和沟槽底面的屏蔽电介质层。 屏蔽电极形成在沟槽的下部，并且沿上沟槽侧壁和屏蔽电极上方形成电介质层。 在屏蔽电极上的沟槽中形成栅电极，形成连接栅电极和屏蔽电极的互连层。