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    PRINTING OF CONTACT METAL AND INTERCONNECT METAL VIA SEED PRINTING AND PLATING
    4.
    发明申请
    PRINTING OF CONTACT METAL AND INTERCONNECT METAL VIA SEED PRINTING AND PLATING 有权
    通过种子印刷和镀层印刷接触金属和互连金属

    公开(公告)号：US20090020829A1

    公开(公告)日：2009-01-22

    申请号：US12175450

    申请日：2008-07-17

    申请人： Aditi CHANDRA ,  Arvind KAMATH ,  James Montague CLEEVES ,  Joerg ROCKENBERGER ,  Mao Takashima ,  Erik SCHER

    发明人： Aditi CHANDRA ,  Arvind KAMATH ,  James Montague CLEEVES ,  Joerg ROCKENBERGER ,  Mao Takashima ,  Erik SCHER

    IPC分类号： H01L21/768 ,  H01L21/28 ,  H01L29/78

    CPC分类号： H01L21/288 ,  H01L21/28518 ,  H01L21/32051 ,  H01L21/32053 ,  H01L21/76838 ,  H01L21/76873 ,  H01L21/76895 ,  H01L27/1285 ,  H01L27/1292 ,  H01L29/458 ,  H01L29/78618 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Methods of forming contacts (and optionally, local interconnects) using an ink comprising a silicide-forming metal, electrical devices such as diodes and/or transistors including such contacts and (optional) local interconnects, and methods for forming such devices are disclosed. The method of forming contacts includes depositing an ink of a silicide-forming metal onto an exposed silicon surface, drying the ink to form a silicide-forming metal precursor, and heating the silicide-forming metal precursor and the silicon surface to form a metal silicide contact. Optionally, the metal precursor ink may be selectively deposited onto a dielectric layer adjacent to the exposed silicon surface to form a metal-containing interconnect. Furthermore, one or more bulk conductive metal(s) may be deposited on remaining metal precursor ink and/or the dielectric layer. Electrical devices, such as diodes and transistors may be made using such printed contact and/or local interconnects. A metal ink may be printed for contacts as well as for local interconnects at the same time, or in the alternative, the printed metal can act as a seed for electroless deposition of other metals if different metals are desired for the contact and the interconnect lines. This approach advantageously reduces the number of processing steps and does not necessarily require any etching.

    摘要翻译： 公开了使用包含硅化物形成金属的油墨形成触点（和任选的局部互连）的方法，诸如二极管和/或包括这种触点的晶体管的电气器件，（可选的）局部互连）以及用于形成这种器件的方法。 形成接触的方法包括将硅化物形成金属的油墨沉积到暴露的硅表面上，干燥油墨以形成形成硅化物的金属前体，以及加热形成硅化物的金属前体和硅表面以形成金属硅化物 联系。 任选地，可以将金属前体油墨选择性地沉积到与暴露的硅表面相邻的电介质层上，以形成含金属互连。 此外，一个或多个体导电金属可以沉积在剩余的金属前体油墨和/或介电层上。 可以使用这种印刷的接触和/或局部互连来制造电子器件，例如二极管和晶体管。 金属墨水可以同时印刷以用于接触以及局部互连，或者替代地，如果需要用于接触和互连线的不同金属，印刷金属可以用作其它金属的无电沉积的种子 。 这种方法有利地减少了处理步骤的数量，并且不一定需要任何蚀刻。

    Epitaxial Structures, Methods of Forming the Same, and Devices Including the Same
    5.
    发明申请
    Epitaxial Structures, Methods of Forming the Same, and Devices Including the Same 有权
    外延结构，其形成方法及包括其的装置

    公开(公告)号：US20110240997A1

    公开(公告)日：2011-10-06

    申请号：US13081257

    申请日：2011-04-06

    申请人： Joerg ROCKENBERGER ,  Fabio Zürcher ,  Mao Takashima

    发明人： Joerg ROCKENBERGER ,  Fabio Zürcher ,  Mao Takashima

    IPC分类号： H01L29/04 ,  H01L21/20

    CPC分类号： H01L21/0237 ,  H01L21/02428 ,  H01L21/0243 ,  H01L21/02494 ,  H01L21/02532 ,  H01L21/02587 ,  H01L21/02628 ,  H01L21/02661 ,  H01L21/228 ,  H01L31/068 ,  H01L31/1804 ,  Y02E10/547 ,  Y02P70/521

    摘要： Epitaxial structures, methods of making epitaxial structures, and devices incorporating such epitaxial structures are disclosed. The methods and the structures employ a liquid-phase Group IVA semiconductor element precursor ink (e.g., including a cyclo- and/or polysilane) and have a relatively good film quality (e.g., texture, density and/or purity). The Group IVA semiconductor element precursor ink forms an epitaxial film or feature when deposited on a (poly)crystalline substrate surface and heated sufficiently for the Group IVA semiconductor precursor film or feature to adopt the (poly)crystalline structure of the substrate surface. Devices incorporating a selective emitter that includes the present epitaxial structure may exhibit improved power conversion efficiency relative to a device having a selective emitter made without such a structure due to the improved film quality and/or the perfect interface formed in regions between the epitaxial film and contacts formed on the film.

    摘要翻译： 公开了外延结构，制造外延结构的方法和结合这种外延结构的器件。 方法和结构采用液相IVA族半导体元件前体油墨（例如，包括环和/或聚硅烷）并且具有相对较好的膜质量（例如质地，密度和/或纯度）。 当IVA半导体元件前体油墨沉积在（多）晶体衬底表面上时，IVA半导体元件前体油墨形成外延膜或特征，并充分加热以使IVA族半导体前体膜或特征采用衬底表面的（多）晶体结构。 结合包括本外延结构的选择性发射极的器件相对于具有选择性发射极的器件而言，具有提高的功率转换效率，由于改善的膜质量和/或在外延膜和 在电影上形成的触点。

    PRINTED, SELF-ALIGNED, TOP GATE THIN FILM TRANSISTOR
    7.
    发明申请
    PRINTED, SELF-ALIGNED, TOP GATE THIN FILM TRANSISTOR 审中-公开
    打印，自对准，顶盖薄膜晶体管

    公开(公告)号：US20140299883A1

    公开(公告)日：2014-10-09

    申请号：US14311044

    申请日：2014-06-20

    申请人： Joerg ROCKENBERGER ,  James Montague Cleeves ,  Arvind Kamath

    发明人： Joerg ROCKENBERGER ,  James Montague Cleeves ,  Arvind Kamath

    IPC分类号： H01L29/786

    CPC分类号： H01L29/7866 ,  B82Y10/00 ,  H01L27/1248 ,  H01L27/1292 ,  H01L29/458 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/78681 ,  H01L29/7869

    摘要： A self-aligned top-gate thin film transistor (TFT) and a method of forming such a thin film transistor, by forming a semiconductor thin film layer; printing a doped glass pattern thereon, a gap in the doped glass pattern defining a channel region of the TFT; forming a gate electrode on or over the channel region, the gate electrode comprising a gate dielectric film and a gate conductor thereon; and diffusing a dopant from the doped glass pattern into the semiconductor thin film layer.

    摘要翻译： 一种自对准顶栅薄膜晶体管（TFT）和通过形成半导体薄膜层形成这种薄膜晶体管的方法; 在其上印刷掺杂的玻璃图案，所述掺杂玻璃图案中的间隙限定所述TFT的沟道区域; 在沟道区域上或上方形成栅电极，栅电极在其上包括栅介质膜和栅极导体; 并且将掺杂剂从掺杂的玻璃图案扩散到半导体薄膜层中。