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    SEMICONDUCTOR DEVICE HAVING INTERCONNECTION STRUCTURE
    3.
    发明申请
    SEMICONDUCTOR DEVICE HAVING INTERCONNECTION STRUCTURE 有权
    具有互连结构的半导体器件

    公开(公告)号：US20170011996A1

    公开(公告)日：2017-01-12

    申请号：US15201922

    申请日：2016-07-05

    申请人： Dohyun LEE ,  Youngwoo Park ,  Junghoon Park ,  Jaeduk Lee

    发明人： Dohyun LEE ,  Youngwoo Park ,  Junghoon Park ,  Jaeduk Lee

    IPC分类号： H01L23/528 ,  H01L23/522 ,  H01L21/768 ,  H01L27/115

    CPC分类号： H01L21/76877 ,  H01L21/76816 ,  H01L23/522 ,  H01L23/5226 ,  H01L23/5283 ,  H01L23/53266 ,  H01L23/53295 ,  H01L27/1157 ,  H01L27/11573 ,  H01L27/11575 ,  H01L27/11582

    摘要： A semiconductor device includes a semiconductor pattern on a semiconductor substrate, a three-dimensional memory array on the semiconductor pattern, and a peripheral interconnection structure between the semiconductor pattern and the semiconductor substrate. The peripheral interconnection structure includes an upper interconnection structure on a lower interconnection structure. The upper interconnection structure includes an upper interconnection and an upper barrier layer. The lower interconnection structure includes a lower interconnection and a lower barrier layer. The upper barrier layer is under a bottom surface of the upper interconnection and does not cover side surfaces of the upper interconnection. The lower barrier layer is under a bottom surface of the lower interconnection and covers side surfaces of the lower interconnection.

    摘要翻译： 半导体器件包括在半导体衬底上的半导体图案，半导体图案上的三维存储器阵列以及半导体图案和半导体衬底之间的外围互连结构。 外围互连结构包括在较低互连结构上的上互连结构。 上互连结构包括上互连和上阻挡层。 下部互连结构包括下部互连和下部阻挡层。 上阻挡层在上互连的底表面下方并且不覆盖上互连的侧表面。 下阻挡层在下互连的底表面下方并且覆盖下互连的侧表面。

    Nonvolatile memory device and method of programming the same
    6.
    发明授权
    Nonvolatile memory device and method of programming the same 有权
    非易失存储器件及其编程方法

    公开(公告)号：US09025383B2

    公开(公告)日：2015-05-05

    申请号：US13650545

    申请日：2012-10-12

    申请人： Sang-Wan Nam ,  Junghoon Park

    发明人： Sang-Wan Nam ,  Junghoon Park

    IPC分类号： G11C16/04 ,  G11C16/10

    CPC分类号： G11C16/10 ,  G11C16/0483

    摘要： A method is provided for programming a nonvolatile memory device, which includes multiple memory cells connected in series in a direction substantially perpendicular to a substrate. The method includes programming a first memory cell of the multiple memory cells, and programming a second memory cell of the multiple memory cells after the first memory cell is programmed, the second memory cell being closer to the substrate than the first memory cell. A diameter of a channel hole of the first memory cell is larger than a diameter of a channel hole of the second memory cell.

    摘要翻译： 提供一种用于对非易失性存储器件进行编程的方法，该非易失性存储器件包括在基本上垂直于衬底的方向上串联连接的多个存储器单元。 该方法包括编程多个存储器单元的第一存储单元，以及在编程第一存储单元之后对多个存储器单元的第二存储单元进行编程，第二存储单元比第一存储单元更靠近衬底。 第一存储单元的通道孔的直径大于第二存储单元的通道孔的直径。

    BACKLIGHT UNIT AND LIQUID CRYSTAL DISPLAY USING THE SAME
    7.
    发明申请
    BACKLIGHT UNIT AND LIQUID CRYSTAL DISPLAY USING THE SAME 有权
    背光单元和使用其的液晶显示器

    公开(公告)号：US20110273642A1

    公开(公告)日：2011-11-10

    申请号：US12903634

    申请日：2010-10-13

    申请人： Youngmin KWEON ,  Youngeun Lee ,  Junghoon Park

    发明人： Youngmin KWEON ,  Youngeun Lee ,  Junghoon Park

    IPC分类号： G02F1/1335 ,  F21V7/04

    CPC分类号： G02F1/1336 ,  G02B6/0083 ,  G02B6/0088 ,  G02F2001/133612

    摘要： A backlight unit and a liquid crystal display using the same are disclosed. The backlight unit includes a plurality of light sources generating light, a light source printed circuit board (PCB) on which the plurality of light sources are mounted, a protrusion that protrudes from one side of the light source PCB and is fastened to a connector used to supply a driving power to the plurality of light sources, and a bottom cover that receives the light source PCB and has a through hole through which the protrusion passes. The connector is exposed to the outside through the through hole.

    摘要翻译： 公开了使用其的背光单元和液晶显示器。 背光单元包括产生光的多个光源，安装有多个光源的光源印刷电路板（PCB），从光源PCB的一侧突出并且被紧固到所使用的连接器的突起 以向多个光源提供驱动力，以及底盖，其接收光源PCB并具有突出部穿过的通孔。 连接器通过通孔暴露于外部。

    Nonvolatile Memory Device and Operating Method Thereof
    8.
    发明申请
    Nonvolatile Memory Device and Operating Method Thereof 审中-公开
    非易失性存储器件及其操作方法

    公开(公告)号：US20100229007A1

    公开(公告)日：2010-09-09

    申请号：US12711720

    申请日：2010-02-24

    申请人： Junghoon Park

    发明人： Junghoon Park

    IPC分类号： G06F12/14

    CPC分类号： G11C16/10 ,  G11C7/1006 ,  G11C2029/0409

    摘要： An operating method of a non-volatile memory device includes randomizing source data to form randomized source data, storing the randomized source data, generating a seed based on an address, generating a random data sequence based on the seed, and de-randomizing the randomized data using the random data sequence. Related nonvolatile memory devices and methods of reading data stored in non-volatile memory devices are also disclosed.

    摘要翻译： 非易失性存储器件的操作方法包括随机化源数据以形成随机化源数据，存储随机化源数据，基于地址生成种子，基于种子生成随机数据序列，以及将随机化的源数据去随机化 数据使用随机数据序列。 还公开了相关的非易失性存储器件和读取存储在非易失性存储器件中的数据的方法。

    Nonvolatile memory and erasing method thereof
    9.
    发明授权
    Nonvolatile memory and erasing method thereof 有权
    非易失性存储器及其擦除方法

    公开(公告)号：US08837228B2

    公开(公告)日：2014-09-16

    申请号：US13597534

    申请日：2012-08-29

    申请人： Sang-Wan Nam ,  Won-Teack Jung ,  Junghoon Park

    发明人： Sang-Wan Nam ,  Won-Teack Jung ,  Junghoon Park

    IPC分类号： G11C16/16 ,  G11C16/04 ,  H01L27/115 ,  G11C16/34 ,  G11C16/14

    CPC分类号： G11C16/14 ,  G11C16/0466 ,  G11C16/0483 ,  G11C16/08 ,  G11C16/16 ,  G11C16/3418 ,  G11C16/344 ,  G11C16/3445 ,  H01L27/115

    摘要： An erase method of a nonvolatile memory includes supplying an erase voltage to a substrate, supplying a selection word line voltage to word lines connected with a selected sub-block within a memory block of the nonvolatile memory, supplying a non-selection word line voltage to word lines connected with an unselected sub-block within the memory block during a first delay time from a point of time when the erase voltage is supplied, and thereafter floating the word lines connected with the unselected sub-block.

    摘要翻译： 非易失性存储器的擦除方法包括向衬底提供擦除电压，将选择字线电压提供给与非易失性存储器的存储块内的选定子块相连的字线，将非选择字线电压提供给 在从提供擦除电压的时间点起的第一延迟时间期间，与存储器块内的未选择子块相连的字线，然后浮动与未选择子块相连的字线。

    Operating method of nonvolatile memory and method of controlling nonvolatile memory
    10.
    发明授权
    Operating method of nonvolatile memory and method of controlling nonvolatile memory 有权
    非易失性存储器的操作方法和非易失性存储器的控制方法

    公开(公告)号：US09076683B2

    公开(公告)日：2015-07-07

    申请号：US13587955

    申请日：2012-08-17

    申请人： Sang-Wan Nam ,  Kang-Bin Lee ,  Junghoon Park

    发明人： Sang-Wan Nam ,  Kang-Bin Lee ,  Junghoon Park

    IPC分类号： G11C16/04 ,  H01L27/115 ,  G11C16/34

    CPC分类号： G11C16/26 ,  G11C16/0483 ,  G11C16/12 ,  G11C16/16 ,  G11C16/34 ,  G11C16/3459 ,  H01L27/1157 ,  H01L27/11582

    摘要： An operating method of a nonvolatile memory, which includes a plurality of cell strings, each cell string having a plurality of memory cells and a string selection transistor stacked on a substrate, includes detecting threshold voltages of the string selection transistors of the plurality of cell strings; adjusting voltages to be supplied to the string selection transistors according to the detected threshold voltages; and applying the adjusted voltages to the string selection transistors to select or unselect the plurality of cell strings during a programming operation.

    摘要翻译： 一种非易失性存储器的操作方法，包括多个单元串，具有多个存储单元的每个单元串和堆叠在基板上的串选择晶体管，包括检测多个单元串中的串选择晶体管的阈值电压 ; 根据检测到的阈值电压调整提供给串选择晶体管的电压; 以及将调整后的电压施加到串选择晶体管，以在编程操作期间选择或取消选择多个单元串。