公开(公告)号：US5438155A

公开(公告)日：1995-08-01

申请号：US154086

申请日：1993-11-18

申请人： Eiji Matsuda ,  Toshinori Matsuda ,  Tsuyoshi Koike

发明人： Eiji Matsuda ,  Toshinori Matsuda ,  Tsuyoshi Koike

IPC分类号： G06F3/023 ,  G10H1/00 ,  G10H1/053 ,  G10H1/18 ,  G10H1/34 ,  H03M11/14 ,  G09B15/02 ,  G10H1/02

CPC分类号： G10H1/34 ,  G10H1/18

摘要： An electronic musical instrument having a plurality of switches is disclosed wherein a numerical value can be inputted without provision of a specific switch for inputting a numerical value. The electronic musical instrument has a tone/effect inputting mode in which, when one of the switches is operated, a tone or acoustic effect allocated in advance to the operated switch is set and a numeric inputting mode in which, when one of the switches is operated, a numerical value allocated in advance to the operated switch is set. A change-over switch is provided for changing over the operation mode between the tone/effect inputting mode and the numeric inputting mode.

摘要翻译： 公开了一种具有多个开关的电子乐器，其中可以输入数值而不设置用于输入数值的特定开关。 电子乐器具有音调/效果输入模式，其中当其中一个开关被操作时，设置预先分配给操作的开关的音调或声音效果，以及数字输入模式，其中当一个开关是 设置预先分配给操作的开关的数值。 提供转换开关，用于改变音色/效果输入模式和数字输入模式之间的操作模式。

公开(公告)号：US20130257846A1

公开(公告)日：2013-10-03

申请号：US13993922

申请日：2011-12-12

申请人： Eiji Matsuda ,  Yasushi Sasaki ,  Yuhichiroh Murakami ,  Seijirou Gyouten ,  Shuji Nishi ,  Makoto Yokoyama

发明人： Eiji Matsuda ,  Yasushi Sasaki ,  Yuhichiroh Murakami ,  Seijirou Gyouten ,  Shuji Nishi ,  Makoto Yokoyama

IPC分类号： G09G3/36

CPC分类号： G09G3/3618 ,  G09G3/3648 ,  G09G2300/0852 ,  G09G2300/0857 ,  G09G2300/0876

摘要： A memory-type liquid crystal display device includes transistors (N1, N2), retention electrodes (MRY), refresh output control sections (RS1), and capacitors (Cb1). In a data retention period, an electric potential of each of the retention electrodes (MRY) is changed via a corresponding one of the capacitors (Cb1) by changing an electric potential level of a retention capacitor wire signal that is supplied to a corresponding CS line (CSL(i)). Each of the refresh output control sections (RS1) receives the electric potential thus changed of a corresponding one of the retention electrodes (MRY) via the input section and controls an electric potential of a corresponding pixel electrode (PIX) in accordance with the electric potential thus changed.

摘要翻译： 记忆型液晶显示装置包括晶体管（N1，N2），保持电极（MRY），刷新输出控制部分（RS1）和电容器（Cb1）。 在数据保持期间，通过改变提供给相应的CS行的保持电容配线信号的电位电平，经由相应的一个电容器（Cb1）来改变每个保持电极（MRY）的电位 （CSL（i））。 每个刷新输出控制部分（RS1）经由输入部分接收相应的一个保持电极（MRY）所改变的电位，并根据电位控制对应的像素电极（PIX）的电位 从而改变了。

公开(公告)号：US08370980B2

公开(公告)日：2013-02-12

申请号：US11838480

申请日：2007-08-14

申请人： Hiroko Minayoshi ,  Eiji Matsuda ,  Kiyonobu Yoshida ,  Haruo Ida ,  Yukihiro Kitazaki

发明人： Hiroko Minayoshi ,  Eiji Matsuda ,  Kiyonobu Yoshida ,  Haruo Ida ,  Yukihiro Kitazaki

IPC分类号： D06F33/02

CPC分类号： D06F35/006

摘要： A drum type washing machine includes a rotating drum having a rotating axis in a substantially horizontal direction and sustained rotatably in a tub. The washing machine further includes a motor for driving the rotating drum, a water supply for supplying water into the tub, and a controller for washing, rinsing and liquid-extracting by controlling workings of the motor. The controller of the washing machine washes a laundry by pouring detergent bubbles in the washing process.

摘要翻译： 滚筒式洗衣机包括旋转滚筒，旋转滚筒具有基本上水平的方向的旋转轴线，并可旋转地保持在桶中。 洗衣机还包括用于驱动旋转滚筒的马达，用于将水供给到桶中的供水装置，以及通过控制马达的运转来进行洗涤，冲洗和液体提取的控制器。 洗衣机的控制器通过在洗涤过程中倾倒洗涤剂气泡来洗涤衣物。

公开(公告)号：US07791581B2

公开(公告)日：2010-09-07

申请号：US10714935

申请日：2003-11-18

申请人： Kazuhiro Maeda ,  Hajime Washio ,  Eiji Matsuda ,  Yuhichiroh Murakami

发明人： Kazuhiro Maeda ,  Hajime Washio ,  Eiji Matsuda ,  Yuhichiroh Murakami

IPC分类号： G09G3/36

CPC分类号： G09G3/3688 ,  G09G3/3607 ,  G09G3/3648 ,  G09G2300/0842 ,  G09G2310/027

摘要： In a shift register block according to the present invention, a plurality of flip-flops F/F(1), F/F(2), . . . F/F(n) constitute a shift register SR, and each adjacent ones of these flip-flops are therebetween having a corresponding one of waveform processing circuits WR(1) through WR(n), so that the shift register SR and the waveform processing circuits WR(1) and WR(n) are linearly aligned. With such an arrangment, it is possible to reduce area occupied by a signal line driving circuit including the shift register block, thereby narrowing the frame area of a display device.

摘要翻译： 在根据本发明的移位寄存器块中，多个触发器F / F（1），F / F（2）， 。 。 F / F（n）构成移位寄存器SR，并且这些触发器中的每个相邻的触发器之间具有对应的一个波形处理电路WR（1）至WR（n），使得移位寄存器SR和波形 处理电路WR（1）和WR（n）是直线对齐的。 通过这样的布置，可以减少包括移位寄存器块的信号线驱动电路所占用的面积，从而使显示装置的帧区域变窄。

公开(公告)号：US20070024568A1

公开(公告)日：2007-02-01

申请号：US11543219

申请日：2006-10-05

申请人： Shunsuke Hayashi ,  Seijirou Gyouten ,  Hajime Washio ,  Eiji Matsuda ,  Sachio Tsujino ,  Yuichiro Murakami

发明人： Shunsuke Hayashi ,  Seijirou Gyouten ,  Hajime Washio ,  Eiji Matsuda ,  Sachio Tsujino ,  Yuichiro Murakami

IPC分类号： G09G3/36

CPC分类号： G11C19/00 ,  G09G3/20 ,  G09G2300/08 ,  G09G2310/0267 ,  G09G2310/0275 ,  G09G2310/0283 ,  G09G2310/0286 ,  G09G2310/08 ,  G11C19/28

摘要： A shift register includes plural stages of flip-flops. The last-stage flip-flop Fn and the flip-flop Fn−1 that is the preceding flip-flop thereof are reset by inputting thereto an output signal from the last-stage flip-flop. A delaying means is provided, between an output terminal Q of the last-stage flip-flop for outputting the output signal and an input terminal R of the last-stage flip-flop for receiving the output signal, for delaying an input of the output signal to the input terminal R. The flip-flop Fn is reset at same time or after the preceding flip-flop Fn−1 is reset. With this arrangement, it is possible to prevent malfunctions of circuits due to a failure to reset the flip-flops.

公开(公告)号：US07133017B2

公开(公告)日：2006-11-07

申请号：US10387860

申请日：2003-03-14

申请人： Shunsuke Hayashi ,  Seijirou Gyouten ,  Hajime Washio ,  Eiji Matsuda ,  Sachio Tsujino ,  Yuichiro Murakami

发明人： Shunsuke Hayashi ,  Seijirou Gyouten ,  Hajime Washio ,  Eiji Matsuda ,  Sachio Tsujino ,  Yuichiro Murakami

IPC分类号： G09G3/36

CPC分类号： G11C19/00 ,  G09G3/20 ,  G09G2300/08 ,  G09G2310/0267 ,  G09G2310/0275 ,  G09G2310/0283 ,  G09G2310/0286 ,  G09G2310/08 ,  G11C19/28

摘要： A shift register includes plural stages of flip-flops. The last-stage flip-flop Fn and the flip-flop Fn−1 that is the preceding flip-flop thereof are reset by inputting thereto an output signal from the last-stage flip-flop. A delaying means is provided, between an output terminal Q of the last-stage flip-flop for outputting the output signal and an input terminal R of the last-stage flip-flop for receiving the output signal, for delaying an input of the output signal to the input terminal R. The flip-flop Fn is reset at same time or after the preceding flip-flop Fn−1 is reset. With this arrangement, it is possible to prevent malfunctions of circuits due to a failure to reset the flip-flops.

公开(公告)号：US5939789A

公开(公告)日：1999-08-17

申请号：US893323

申请日：1997-07-16

申请人： Michifumi Kawai ,  Ryohei Satoh ,  Osamu Yamada ,  Eiji Matsuda ,  Masakazu Ishino ,  Takashi Inoue ,  Hideo Sotokawa ,  Masayuki Kyoui

发明人： Michifumi Kawai ,  Ryohei Satoh ,  Osamu Yamada ,  Eiji Matsuda ,  Masakazu Ishino ,  Takashi Inoue ,  Hideo Sotokawa ,  Masayuki Kyoui

IPC分类号： H05K3/46 ,  H01L21/48 ,  H05K3/28 ,  H05K3/42 ,  H01L23/485

CPC分类号： H01L21/4857 ,  H05K3/4617 ,  H01L2924/0002 ,  H05K1/0272 ,  H05K2201/0195 ,  H05K2201/09563 ,  H05K2203/1189 ,  H05K3/28 ,  H05K3/423

摘要： A multilayer substrate which is fabricated by laminating a plurality of substrates, each comprising an insulation film, a plurality of via holes which pass through the upper surface to the lower surface of the insulation film, a wiring which is provided on the upper surface of the insulation film and the upper surface of the via holes and electrically connected with the via holes, a bonding member which is provided on the lower surfaces of the via holes and electrically connected with the via holes, and a bonding layer which is provided on the upper surface of the insulation film where the wiring is formed and the method of fabrication thereof whereby large costs reduction and high density effect can be obtained.

摘要翻译： 一种多层基板，其通过层叠多个基板而制造，所述多个基板包括绝缘膜，穿过所述上表面的绝缘膜的下表面的多个通孔，设置在所述绝缘膜的上表面上的布线 绝缘膜和通孔的上表面并与通孔电连接;接合构件，其设置在通孔的下表面上并与通孔电连接;以及接合层，其设置在上部 形成布线的绝缘膜的表面及其制造方法，从而可以获得大量的成本降低和高密度效果。

公开(公告)号：US5473108A

公开(公告)日：1995-12-05

申请号：US178551

申请日：1994-01-06

申请人： Eiji Matsuda ,  Gen Izumisawa ,  Hiroshi Kitagawa

发明人： Eiji Matsuda ,  Gen Izumisawa ,  Hiroshi Kitagawa

IPC分类号： G10H1/12 ,  G10H1/46 ,  G10H7/00

CPC分类号： G10H1/46 ,  G10H1/12 ,  G10H7/002 ,  Y10S84/09 ,  Y10S84/11

摘要： An electronic musical instrument reads data of a musical tone from a waveform memory thereof according to pitch information input thereto, to form a tone signal containing a tone amplitude signal indicative of amplitude of the musical tone. The tone signal is passed into a plurality of signal paths to be formed into a plurality of analog tone signals. The plurality of signals paths each amplify the tone amplitude signal according to a note on/off velocity, and attenuate a plurality of modifications of the tone signal, depending on or not depending on the note on/off velocity and the pitch information on the musical tone, to generate a musical tone suitably reflecting the note on/off velocity and the pitch.

摘要翻译： 电子乐器根据输入的音调信息从其波形存储器读取音调的数据，以形成包含表示乐音幅度的音调幅度信号的音调信号。 音调信号被传送到多个信号路径中，以形成多个模拟音调信号。 多个信号路径各自根据音符开/关速度放大音调幅度信号，并且根据或不依赖于音符开/关速度和音乐上的音调信息来衰减音调信号的多个修改 音调，以产生适当地反映音符开/关速度和音调的音调。

公开(公告)号：US5428183A

公开(公告)日：1995-06-27

申请号：US168191

申请日：1993-12-17

申请人： Eiji Matsuda ,  Hiroshi Kitagawa ,  Gen Izumisawa ,  Jiro Tanaka

发明人： Eiji Matsuda ,  Hiroshi Kitagawa ,  Gen Izumisawa ,  Jiro Tanaka

IPC分类号： G10H1/053 ,  G10H1/12 ,  G10H7/02 ,  G10H7/08

CPC分类号： G10H1/125 ,  G10H7/02 ,  Y10S84/09

摘要： A tone signal generating apparatus, including a memory for storing wave data containing frequency components within a full band; a tone generator for reading the wave data from the memory in accordance with key ON/OFF data to generate a tone signal; a velocity generator for generating a velocity value based on key ON/OFF data; a first coefficient processor for producing a first coefficient to control the amplitude in accordance with the velocity value generated by the velocity generator; a first operator for performing an operation on the first coefficient produced by the first coefficient processor and the tone signal generated by the tone generator, a filter for extracting frequency components within a specific band from the tone signal output from the first operator to produce a first tone signal and outputting the first tone signal; a second coefficient processor for producing a second coefficient to control the amplitude in accordance with the velocity value generated by the velocity generator; and a second operator for performing an operation on the second coefficient produced by the second coefficient processor and the tone signal produced by the tone generator to obtain a second tone signal and outputting the second tone signal.

摘要翻译： 一种音频信号发生装置，包括用于存储包含全频段内的频率分量的波形数据的存储器; 一个乐音发生器，用于根据键ON / OFF数据从存储器中读出波形数据，以产生音调信号; 速度发生器，用于基于键ON / OFF数据产生速度值; 第一系数处理器，用于产生根据由速度发生器产生的速度值来控制幅度的第一系数; 用于对由第一系数处理器产生的第一系数和由乐音发生器产生的音调信号执行操作的第一操作器，用于从第一操作器输出的音调信号中提取特定频带内的频率分量的滤波器，以产生第一 并输出第一音调信号; 第二系数处理器，用于产生根据由速度发生器产生的速度值来控制振幅的第二系数; 以及第二运算器，用于对由第二系数处理器产生的第二系数和由乐音发生器产生的音调信号执行操作以获得第二音调信号并输出​​第二音调信号。

公开(公告)号：US5380949A

公开(公告)日：1995-01-10

申请号：US21756

申请日：1993-02-24

申请人： Eiji Matsuda

发明人： Eiji Matsuda

IPC分类号： G10H1/00 ,  G10H1/18 ,  G10H7/00 ,  G10H1/22

CPC分类号： G10H1/0066 ,  G10H1/186

摘要： A key assigner for an electronic musical instrument having multiple tone channels for tone signals generated by tone signal generator means controlled by a tone signal generation instruction input device. The key assigner includes a random access memory having an assignment table for storing priority level value data for each of the multiple tone channels for controlling the order in which musical tone signals present in the tone channels are halted when new tone signals are to be generated. An assigner halts the existing tone signal for the tone channel having the lowest priority level value in the assignment table upon the generation of a new tone signal instruction and assigns the new musical tone signal to that tone channel. A control provides priority level value data for storage in the memory in consonance with musical attribute data for the new musical tone, such as sustainment or attenuation of the new tone.

摘要翻译： 一种用于电子乐器的键分配器，具有由音调信号发生指令输入装置控制的音调信号发生器装置产生的音调信号的多个音调通道。 钥匙分配器包括随机存取存储器，该存储器具有用于存储用于多个音调通道中的每一个的优先级值数据的分配表，用于控制当要生成新音调信号时暂停音调通道中存在的乐音信号的顺序。 在生成新的音调信号指令时，分配器停止分配表中具有最低优先级值的音调信道的现有音调信号，并将新的音调信号分配给该音调信道。 控制提供优先级数据数据，以便与新音乐的音乐属性数据相符合，以存储在存储器中，例如新音调的维持或衰减。