公开(公告)号：US20150087142A1

公开(公告)日：2015-03-26

申请号：US14555182

申请日：2014-11-26

申请人： ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

发明人： Jong-Won LIM ,  Ho Kyun AHN ,  Young Rak PARK ,  Dong Min KANG ,  Woo Jin CHANG ,  Seong-il KIM ,  Sung Bum BAE ,  Sang-Heung LEE ,  Hyung Sup YOON ,  Chull Won JU ,  Jae Kyoung MUN ,  Eun Soo NAM

IPC分类号： H01L29/66 ,  H01L21/311 ,  H01L21/28 ,  H01L29/423

CPC分类号： H01L29/66431 ,  H01L21/28255 ,  H01L21/31116 ,  H01L21/31144 ,  H01L29/1608 ,  H01L29/42316 ,  H01L29/42376 ,  H01L29/66068 ,  H01L29/7787

摘要： Disclosed is a manufacturing method of a high electron mobility transistor. The method includes: forming a source electrode and a drain electrode on a substrate; forming a first insulating film having a first opening on an entire surface of the substrate, the first opening exposing a part of the substrate; forming a second insulating film having a second opening within the first opening, the second opening exposing a part of the substrate; forming a third insulating film having a third opening within the second opening, the third opening exposing a part of the substrate; etching a part of the first insulating film, the second insulating film and the third insulating film so as to expose the source electrode and the drain electrode; and forming a T-gate electrode on a support structure including the first insulating film, the second insulating film and the third insulating film.

摘要翻译： 公开了一种高电子迁移率晶体管的制造方法。 该方法包括：在基板上形成源电极和漏电极; 在所述基板的整个表面上形成具有第一开口的第一绝缘膜，所述第一开口暴露所述基板的一部分; 在所述第一开口内形成具有第二开口的第二绝缘膜，所述第二开口暴露所述基板的一部分; 在所述第二开口内形成具有第三开口的第三绝缘膜，所述第三开口暴露所述基板的一部分; 蚀刻第一绝缘膜，第二绝缘膜和第三绝缘膜的一部分，以使源电极和漏电极露出; 以及在包括第一绝缘膜，第二绝缘膜和第三绝缘膜的支撑结构上形成T栅电极。

公开(公告)号：US20140213045A1

公开(公告)日：2014-07-31

申请号：US14230031

申请日：2014-03-31

申请人： Electronics and Telecommunications Research Institute

发明人： Sung Bum BAE ,  Eun Soo NAM ,  Jae Kyoung MUN ,  Sung Bock KIM ,  Hae Cheon KIM ,  Chull Won JU ,  Sang Choon KO ,  Jong-Won LIM ,  Ho Kyun AHN ,  Woo Jin CHANG ,  Young Rak PARK

IPC分类号： H01L29/66

CPC分类号： H01L29/66446 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02647 ,  H01L21/8252 ,  H01L27/0605 ,  H01L27/0883

摘要： The present disclosure relates to a nitride electronic device and a method for manufacturing the same, and particularly, to a nitride electronic device and a method for manufacturing the same that can implement various types of nitride integrated structures on the same substrate through a regrowth technology (epitaxially lateral over-growth: ELOG) of a semi-insulating gallium nitride (GaN) layer used in a III-nitride semiconductor electronic device including Group III elements such as gallium (Ga), aluminum (Al) and indium (In) and nitrogen.

摘要翻译： 本发明涉及一种氮化物电子器件及其制造方法，特别涉及一种氮化物电子器件及其制造方法，该氮化物电子器件及其制造方法可以通过再生技术在同一衬底上实现各种氮化物一体化结构（ 用于包括III族元素如镓（Ga），铝（Al）和铟（In））和氮（III）的III族氮化物半导体电子器件中的半绝缘氮化镓（GaN）层的外延横向过度生长：ELOG） 。

公开(公告)号：US20140363937A1

公开(公告)日：2014-12-11

申请号：US14308000

申请日：2014-06-18

申请人： Electronics and Telecommunications Research Institute

发明人： Woo Jin CHANG ,  Jong-Won LIM ,  Ho Kyun AHN ,  Sang Choon KO ,  Sung Bum BAE ,  Chull Won JU ,  Young Rak PARK ,  Jae Kyoung MUN ,  Eun Soo NAM

IPC分类号： H01L29/66 ,  H01L29/40

CPC分类号： H01L29/66901 ,  H01L29/2003 ,  H01L29/401 ,  H01L29/402 ,  H01L29/42316 ,  H01L29/66462 ,  H01L29/7786

摘要： Disclosed are a power semiconductor device and a method of fabricating the same which can increase a breakdown voltage of the device through a field plate formed between a gate electrode and a drain electrode and achieve an easier manufacturing process at the same time. The power semiconductor device according to an exemplary embodiment of the present disclosure includes a source electrode and a drain electrode formed on a substrate; a dielectric layer formed between the source electrode and the drain electrode to have a lower height than heights of the two electrodes and including an etched part exposing the substrate; a gate electrode formed on the etched part; a field plate formed on the dielectric layer between the gate electrode and the drain electrode; and a metal configured to connect the field plate and the source electrode.

摘要翻译： 公开了功率半导体器件及其制造方法，其可以通过形成在栅电极和漏电极之间的场板来增加器件的击穿电压，并且同时实现更容易的制造工艺。 根据本公开的示例性实施例的功率半导体器件包括形成在衬底上的源电极和漏电极; 形成在所述源电极和所述漏电极之间的电介质层具有比所述两个电极的高度低的高度，并且包括暴露所述衬底的蚀刻部分; 形成在蚀刻部分上的栅电极; 形成在栅电极和漏电极之间的电介质层上的场板; 以及配置成连接场板和源电极的金属。