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    TEST DEVICE FOR TESTING PLURALITY OF SAMPLES AND OPERATING METHOD THEREOF
    2.
    发明申请
    TEST DEVICE FOR TESTING PLURALITY OF SAMPLES AND OPERATING METHOD THEREOF 有权
    用于测试样品的多样性的测试装置及其操作方法

    公开(公告)号：US20150177309A1

    公开(公告)日：2015-06-25

    申请号：US14302354

    申请日：2014-06-11

    申请人： ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

    发明人： Jong Min LEE ,  Chull Won JU ,  Byoung Gue MIN

    IPC分类号： G01R31/26 ,  G01R31/28

    CPC分类号： G01R31/2621 ,  G01R31/2608

    摘要： A test device includes: a testing unit connected with a measurement line, and configured to apply bias to the measurement line and measure the measurement line; a plurality of switching units configured to electrically connect the measurement line and the plurality of samples; and a control unit configured to sequentially turn on the plurality of switching units to sequentially apply the bias to the plurality of samples. The control unit determines whether a corresponding device sample has a defect based on a first measurement value according to measurement by the testing unit when the bias is applied to each of the plurality of samples.

    摘要翻译： 测试装置包括：测试单元，与测量线连接，并被配置为向测量线施加偏压并测量测量线; 多个开关单元，被配置为电连接所述测量线和所述多个样本; 以及控制单元，被配置为顺序地接通所述多个开关单元以将所述偏置顺序地施加到所述多个样本。 当偏置被应用于多个样本中的每一个时，控制单元根据测试单元的测量，基于第一测量值来确定对应的设备样本是否具有缺陷。

    COMPONENT PACKAGE INCLUDING MATCHING CIRCUIT AND MATCHING METHOD THEREOF
    4.
    发明申请
    COMPONENT PACKAGE INCLUDING MATCHING CIRCUIT AND MATCHING METHOD THEREOF 有权
    组件包括匹配电路及其匹配方法

    公开(公告)号：US20150270822A1

    公开(公告)日：2015-09-24

    申请号：US14478295

    申请日：2014-09-05

    申请人： Electronics and Telecommunications Research Institute

    发明人： Dong Min KANG ,  Seong Il KIM ,  Sang Heung LEE ,  Chull Won JU ,  Ho Kyun AHN ,  Hyung Sup YOON ,  Jong Won LIM

    IPC分类号： H03H7/38

    CPC分类号： H03H7/38 ,  H01L23/642 ,  H01L2224/49175 ,  H01P1/2039 ,  H01P5/12 ,  H05K1/025 ,  H05K2201/09781

    摘要： Provided herein is a component package including a matching unit and a matching method thereof, the matching unit including: a substrate; a transmission line formed on the substrate, the transmission line being connected to a terminal of the component package; a bonding wire electrically connecting the transmission line and a central component; and a capacitor unit having a plurality of capacitors electrically connected with the transmission line by wiring connection, wherein an inductance of the matching unit is variable by adjusting a length of the bonding wire, and a capacitance of the matching unit is variable by increasing or reducing the number of capacitors electrically connected to the transmission line, of among the capacitors inside the capacitor unit, by extending or cutting off the wiring connection.

    摘要翻译： 本文提供了一种包括匹配单元及其匹配方法的组件封装，所述匹配单元包括：衬底; 形成在所述基板上的传输线，所述传输线连接到所述部件封装的端子; 电连接所述传输线和中心部件的接合线; 以及具有通过布线连接与传输线电连接的多个电容器的电容器单元，其中匹配单元的电感通过调整接合线的长度而变化，并且匹配单元的电容可通过增加或减小而变化 通过延长或切断布线连接，在电容器单元内的电容器之间电连接到传输线的电容器的数量。

    POWER SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF
    5.
    发明申请
    POWER SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF 审中-公开
    功率半导体器件及其制造方法

    公开(公告)号：US20140363937A1

    公开(公告)日：2014-12-11

    申请号：US14308000

    申请日：2014-06-18

    申请人： Electronics and Telecommunications Research Institute

    发明人： Woo Jin CHANG ,  Jong-Won LIM ,  Ho Kyun AHN ,  Sang Choon KO ,  Sung Bum BAE ,  Chull Won JU ,  Young Rak PARK ,  Jae Kyoung MUN ,  Eun Soo NAM

    IPC分类号： H01L29/66 ,  H01L29/40

    CPC分类号： H01L29/66901 ,  H01L29/2003 ,  H01L29/401 ,  H01L29/402 ,  H01L29/42316 ,  H01L29/66462 ,  H01L29/7786

    摘要： Disclosed are a power semiconductor device and a method of fabricating the same which can increase a breakdown voltage of the device through a field plate formed between a gate electrode and a drain electrode and achieve an easier manufacturing process at the same time. The power semiconductor device according to an exemplary embodiment of the present disclosure includes a source electrode and a drain electrode formed on a substrate; a dielectric layer formed between the source electrode and the drain electrode to have a lower height than heights of the two electrodes and including an etched part exposing the substrate; a gate electrode formed on the etched part; a field plate formed on the dielectric layer between the gate electrode and the drain electrode; and a metal configured to connect the field plate and the source electrode.

    摘要翻译： 公开了功率半导体器件及其制造方法，其可以通过形成在栅电极和漏电极之间的场板来增加器件的击穿电压，并且同时实现更容易的制造工艺。 根据本公开的示例性实施例的功率半导体器件包括形成在衬底上的源电极和漏电极; 形成在所述源电极和所述漏电极之间的电介质层具有比所述两个电极的高度低的高度，并且包括暴露所述衬底的蚀刻部分; 形成在蚀刻部分上的栅电极; 形成在栅电极和漏电极之间的电介质层上的场板; 以及配置成连接场板和源电极的金属。

    FEEDBACK AMPLIFIER
    6.
    发明申请
    FEEDBACK AMPLIFIER 有权
    反馈放大器

    公开(公告)号：US20150349736A1

    公开(公告)日：2015-12-03

    申请号：US14666163

    申请日：2015-03-23

    申请人： ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

    发明人： Sang Heung LEE ,  Dong Min KANG ,  SEONG IL KIM ,  Ho Kyun AHN ,  Hyung Sup YOON ,  Jong Won LIM ,  Chull Won JU

    IPC分类号： H03G1/00 ,  H04Q11/00 ,  H03F3/16

    CPC分类号： H03G1/0088 ,  H03F1/083 ,  H03F3/08 ,  H03F2200/153 ,  H03G3/12

    摘要： Provided herein is a feedback amplifier including an amplifier circuit configured to amplify an input signal input from an input terminal and output the amplified input signal to an output terminal; a feedback circuit configured to apply a feedback resistance value to a signal output to the output terminal, and to control a gain of the amplifier circuit by adjusting the input signal by a bias voltage applied with a feedback resistance value determined; a packet signal sensor configured to generate a fixed resistance control signal for controlling a fixed resistance value included in the feedback resistance value through a comparison between the output from the output terminal with a minimum signal level; and a fixed resistance controller configured to control the fixed resistance value included in the feedback resistance value in response to the fixed resistance control signal.

    摘要翻译： 本文提供了一种反馈放大器，包括：放大器电路，被配置为放大从输入端输入的输入信号，并将放大的输入信号输出到输出端; 反馈电路，被配置为向输出端子输出的信号施加反馈电阻值，并且通过利用所确定的反馈电阻值施加的偏置电压来调节所述输入信号来控制所述放大器电路的增益; 分组信号传感器，被配置为通过比较来自所述输出端子的输出与最小信号电平之间的比较，产生用于控制所述反馈电阻值中包括的固定电阻值的固定电阻控制信号; 以及固定电阻控制器，其被配置为响应于所述固定电阻控制信号来控制包括在所述反馈电阻值中的所述固定电阻值。

    HIGH ELECTRON MOBILITY TRANSISTOR AND MANUFACTURING METHOD THEREOF
    7.
    发明申请
    HIGH ELECTRON MOBILITY TRANSISTOR AND MANUFACTURING METHOD THEREOF 有权
    高电子移动晶体管及其制造方法

    公开(公告)号：US20150087142A1

    公开(公告)日：2015-03-26

    申请号：US14555182

    申请日：2014-11-26

    申请人： ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

    发明人： Jong-Won LIM ,  Ho Kyun AHN ,  Young Rak PARK ,  Dong Min KANG ,  Woo Jin CHANG ,  Seong-il KIM ,  Sung Bum BAE ,  Sang-Heung LEE ,  Hyung Sup YOON ,  Chull Won JU ,  Jae Kyoung MUN ,  Eun Soo NAM

    IPC分类号： H01L29/66 ,  H01L21/311 ,  H01L21/28 ,  H01L29/423

    CPC分类号： H01L29/66431 ,  H01L21/28255 ,  H01L21/31116 ,  H01L21/31144 ,  H01L29/1608 ,  H01L29/42316 ,  H01L29/42376 ,  H01L29/66068 ,  H01L29/7787

    摘要： Disclosed is a manufacturing method of a high electron mobility transistor. The method includes: forming a source electrode and a drain electrode on a substrate; forming a first insulating film having a first opening on an entire surface of the substrate, the first opening exposing a part of the substrate; forming a second insulating film having a second opening within the first opening, the second opening exposing a part of the substrate; forming a third insulating film having a third opening within the second opening, the third opening exposing a part of the substrate; etching a part of the first insulating film, the second insulating film and the third insulating film so as to expose the source electrode and the drain electrode; and forming a T-gate electrode on a support structure including the first insulating film, the second insulating film and the third insulating film.

    摘要翻译： 公开了一种高电子迁移率晶体管的制造方法。 该方法包括：在基板上形成源电极和漏电极; 在所述基板的整个表面上形成具有第一开口的第一绝缘膜，所述第一开口暴露所述基板的一部分; 在所述第一开口内形成具有第二开口的第二绝缘膜，所述第二开口暴露所述基板的一部分; 在所述第二开口内形成具有第三开口的第三绝缘膜，所述第三开口暴露所述基板的一部分; 蚀刻第一绝缘膜，第二绝缘膜和第三绝缘膜的一部分，以使源电极和漏电极露出; 以及在包括第一绝缘膜，第二绝缘膜和第三绝缘膜的支撑结构上形成T栅电极。