摘要:
The present disclosure relates to the drift management for a memory device. In at least one embodiment, the memory device of the present disclosure may include a phase change memory and switch (hereinafter “PCMS”) memory cell and a memory controller that is capable of implementing drift management to control drift. Other embodiments are described and claimed.
摘要:
A memory may include two electrodes and phase change material having an amorphous reset state and a partially crystalized set state, coupled between the two electrodes. The phase change material in the set state may have a highly nonlinear current-voltage response in a subthreshold voltage region. The phase change material may be an alloy of indium, antimony, and tellurium.
摘要:
The present disclosure relates to the fabrication of non-volatile memory devices. In at least one embodiment, the non-volatile memory of the present disclosure may include a phase change memory and switch (hereinafter “PCMS”) memory cell and a process for resetting the PCMS memory utilizing a “look-up” table to calculate a current required to place a bit above a reference level to maximum threshold voltage.
摘要:
The present disclosure relates to the fabrication of non-volatile memory devices. In at least one embodiment, the non-volatile memory of the present disclosure may include a phase change memory and switch (hereinafter “PCMS”) memory cell and a process for resetting the PCMS memory utilizing a “look-up” table to calculate a current required to place a bit above a reference level to maximum threshold voltage.
摘要:
The present disclosure relates to the drift management for a memory device. In at least one embodiment, the memory device of the present disclosure may include a phase change memory and switch (hereinafter “PCMS”) memory cell and a memory controller that is capable of implementing drift management to control drift. Other embodiments are described and claimed.
摘要:
A memory may include two electrodes and phase change material having an amorphous reset state and a partially crystalized set state, coupled between the two electrodes. The phase change material in the set state may have a highly nonlinear current-voltage response in a subthreshold voltage region. The phase change material may be an alloy of indium, antimony, and tellurium.
摘要:
Subject matter disclosed herein relates to a memory device, and more particularly to a self-aligned cross-point phase change memory-switch array and methods of fabricating same.
摘要:
In one or more embodiments, methods of fabricating current-confining stack structures in a phase-change memory switch (PCMS) cell are provided. One embodiment shows a method of fabricating a PCMS cell with current in an upper chalcogenide confined in the row and column directions. In one embodiment, methods of fabricating a PCMS cell with sub-lithographic critical dimension memory chalcogenide are shown. In another embodiment, methods of fabricating a PCMS cell with sub-lithographic critical dimension middle electrode heaters are disclosed.
摘要:
Subject matter disclosed herein relates to a memory device, and more particularly to a self-aligned cross-point phase change memory-switch array and methods of fabricating same.
摘要:
Disturb from the reset to the set state may be reduced by creating an amorphous phase that is substantially free of crystal nuclei when programming the reset state in a phase change memory. In some embodiments, this can be achieved by using a current or a voltage to program that exceeds the threshold voltage of the phase change memory element, but does not exceed a safe current voltage which would cause a disturb.