公开(公告)号：US07078300B2

公开(公告)日：2006-07-18

申请号：US10672631

申请日：2003-09-27

申请人： Evgeni Gousev ,  Huiling Shang ,  Christopher P. D'Emic ,  Paul M. Kozlowski

发明人： Evgeni Gousev ,  Huiling Shang ,  Christopher P. D'Emic ,  Paul M. Kozlowski

IPC分类号： H01L21/336

CPC分类号： H01L21/28202 ,  H01L21/02247 ,  H01L21/02326 ,  H01L21/02337 ,  H01L21/0234 ,  H01L21/28255 ,  H01L21/3143 ,  H01L21/31658 ,  H01L21/318 ,  H01L29/518 ,  Y10S438/906 ,  Y10S438/933

摘要： A method for producing thin, below 6 nm of equivalent oxide thickness, germanium oxynitride layer on Ge-based materials for use as gate dielectric is disclosed. The method involves a two step process. First, nitrogen is incorporated in a surface layer of the Ge-based material. Second, the nitrogen incorporation is followed by an oxidation step. The method yields excellent thickness control of high quality gate dielectrics for Ge-based field effect devices, such as MOS transistors. Structures of devices having the thin germanium oxynitride gate dielectric and processors made with such devices are disclosed, as well.

摘要翻译： 公开了用作栅极电介质的Ge基材料上产生6nm以下等效氧化物厚度薄的锗氮氧化物层的方法。 该方法涉及两步法。 首先，在Ge基材料的表层中加入氮。 其次，氮掺入之后是氧化步骤。 该方法为基于Ge的场效应器件（例如MOS晶体管）的高质量栅极电介质产生优异的厚度控制。 还公开了具有薄氮氧化锗栅电介质的器件的结构和用这种器件制造的处理器。

公开(公告)号：US06350321B1

公开(公告)日：2002-02-26

申请号：US09207353

申请日：1998-12-08

申请人： Kevin K. Chan ,  Christopher P. D'Emic ,  Raymond M. Sicina ,  Paul M. Kozlowski ,  Margaret Manny ,  Sandip Tiwari

发明人： Kevin K. Chan ,  Christopher P. D'Emic ,  Raymond M. Sicina ,  Paul M. Kozlowski ,  Margaret Manny ,  Sandip Tiwari

IPC分类号： C23C1600

CPC分类号： H01L21/67225 ,  C23C14/56

摘要： A cluster system controls the interface properties of the films that deposit or grow on a silicon substrate. The system comprises a plurality of horizontal quartz chamber or tubes each of which can hold a large quantity of wafers, a transfer chamber and a load/unload chamber. Several process steps can be executed sequentially in different tubes without intermediate exposure to ambient air. A transfer chamber connects them and allows wafer transportation from one tube to another in an absolute controlled UHV environment which limits any contamination such as H2O, to less than a monolayer level. In addition, each tube can be pumped down to UHV pressure regime to avoid further cross contamination between tubes or particle generation. Since some of the process requires elevated temperature, all wafers are placed vertically on the quartz boat to prevent any wafer sagging as in a vertical furnace. Furthermore, before any wafers are placed into the transfer chamber, they are loaded into a load/unload chamber, which is the sole connection to the ambient air, to be purged and pumped so as to minimize particles and contamination.

摘要翻译： 簇系统控制在硅衬底上沉积或生长的膜的界面性质。 该系统包括多个水平石英腔或管，每个水平的石英腔或管可以容纳大量的晶片，传送室和装载/卸载室。 可以在不同环境空气的情况下，在不同的管中顺序执行若干工艺步骤。 传输室连接它们，并允许晶片在绝对控制的特高压环境中从一个管到另一个管输送，将任何污染（例如H 2 O）限制到小于单层。 此外，每个管可以泵送到特高压压力状态，以避免管之间的进一步交叉污染或产生颗粒。 由于某些过程需要升高的温度，因此将所有晶片垂直放置在石英舟上，以防止垂直炉中出现任何晶片下垂。 此外，在将任何晶片放入转移室之前，它们被装载到与环境空气的唯一连接的装载/卸载室中，以被清除和泵送，以使颗粒和污染物最小化。

公开(公告)号：US20120156393A1

公开(公告)日：2012-06-21

申请号：US12971243

申请日：2010-12-17

申请人： Osama Tobail ,  Ahmed Abou-Kandil ,  Mostafa M. El-Ashry ,  Jeehwan Kim ,  Paul M. Kozlowski ,  Mohamed Saad ,  Devendra K. Sadana

发明人： Osama Tobail ,  Ahmed Abou-Kandil ,  Mostafa M. El-Ashry ,  Jeehwan Kim ,  Paul M. Kozlowski ,  Mohamed Saad ,  Devendra K. Sadana

IPC分类号： C23C16/50 ,  C23C16/42 ,  C23C16/00

CPC分类号： C23C14/0021 ,  C23C14/14 ,  C23C14/22 ,  C23C16/45514 ,  C23C16/50 ,  H01L21/02123 ,  H01L21/02274

摘要： A hydrogenated thin film is formed in a controlled vacuum on a substrate by evaporating one or more solid materials and passing the resulting vapor and a hydrogen-containing gas into a space between two electrodes. One of the electrodes includes openings for allowing the vapor to enter the space. Plasma is generated within the space to cause dissociation of the hydrogen-containing gas and promote a reaction between the material(s) and hydrogen-containing gas.

摘要翻译： 通过蒸发一种或多种固体材料并使得到的蒸气和含氢气体进入两个电极之间的空间，在受控真空中在基板上形成氢化薄膜。 电极之一包括允许蒸汽进入空间的开口。 在空间内产生等离子体以引起含氢气体的解离并促进材料和含氢气体之间的反应。

公开(公告)号：US08828504B2

公开(公告)日：2014-09-09

申请号：US12971243

申请日：2010-12-17

申请人： Osama Tobail ,  Ahmed Abou-Kandil ,  Mostafa M. El-Ashry ,  Jeehwan Kim ,  Paul M. Kozlowski ,  Mohamed Saad ,  Devendra K. Sadana

发明人： Osama Tobail ,  Ahmed Abou-Kandil ,  Mostafa M. El-Ashry ,  Jeehwan Kim ,  Paul M. Kozlowski ,  Mohamed Saad ,  Devendra K. Sadana

IPC分类号： C23C14/00 ,  C23C16/455 ,  C23C16/50 ,  H01L21/02 ,  C23C14/14 ,  C23C14/22

CPC分类号： C23C14/0021 ,  C23C14/14 ,  C23C14/22 ,  C23C16/45514 ,  C23C16/50 ,  H01L21/02123 ,  H01L21/02274

摘要： A hydrogenated thin film is formed in a controlled vacuum on a substrate by evaporating one or more solid materials and passing the resulting vapor and a hydrogen-containing gas into a space between two electrodes. One of the electrodes includes openings for allowing the vapor to enter the space. Plasma is generated within the space to cause dissociation of the hydrogen-containing gas and promote a reaction between the material(s) and hydrogen-containing gas.

摘要翻译： 通过蒸发一种或多种固体材料并使得到的蒸气和含氢气体进入两个电极之间的空间，在受控真空中在基板上形成氢化薄膜。 电极之一包括允许蒸汽进入空间的开口。 在空间内产生等离子体以引起含氢气体的解离并促进材料和含氢气体之间的反应。

公开(公告)号：US20090186457A1

公开(公告)日：2009-07-23

申请号：US12018427

申请日：2008-01-23

申请人： Kam-Leung Lee ,  Paul M. Kozlowski

发明人： Kam-Leung Lee ,  Paul M. Kozlowski

IPC分类号： H01L21/8238

CPC分类号： H01L21/823814 ,  H01L21/823807 ,  H01L21/823864

摘要： The present invention relates to semiconductor devices, and more particularly to a method for forming a CMOS semiconductor device, the method including a first integration anneal sequence for each NFET and a second integration anneal sequence for each PFET of the semiconductor device. The method includes providing a structure having an nFET gate stack and a pFET gate stack patterned on a substrate. A first disposable spacer is formed adjacent the nFET gate stack and a second disposable spacer is formed adjacent the pFET gate stack. A first doped S/D region and a second doped S/D region are then formed in the substrate. The first and second disposable spacers are removed after the first and second doped S/D regions are formed. A first halo implant and a first S/D extension region are formed adjacent the nFET gate stack after the first and second disposable spacers are removed. The structure is annealed using a RTA process. A first final spacer adjacent the nFET gate stack and the second final spacer adjacent the pFET gate stack are then formed after a second halo implant and a second S/D extension region are formed adjacent the pFET. The structure is annealed using a laser anneal process to form an NFET and a PFET on the substrate.

摘要翻译： 本发明涉及半导体器件，更具体地说，涉及一种用于形成CMOS半导体器件的方法，该方法包括用于每个NFET的第一积分退火序列和用于半导体器件的每个PFET的第二积分退火序列。 该方法包括提供具有在衬底上图案化的nFET栅极堆叠和pFET栅极堆叠的结构。 邻近nFET栅极堆叠形成第一一次性间隔物，并且在pFET栅极堆叠附近形成第二一次性间隔物。 然后在衬底中形成第一掺杂S / D区和第二掺杂S / D区。 在形成第一和第二掺杂S / D区之后去除第一和第二一次性间隔物。 在去除第一和第二一次性间隔物之后，在nFET栅极堆叠附近形成第一晕轮植入物和第一S / D延伸区域。 该结构使用RTA工艺退火。 然后在第二晕轮注入之后形成与nFET栅极堆叠相邻的第一最终间隔物和邻近pFET栅极堆叠的第二最终间隔区，并且在pFET附近形成第二S / D延伸区域。 使用激光退火工艺对该结构进行退火，以在衬底上形成NFET和PFET。