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    Power converter with dead-time variation to disperse distortion
    2.
    发明授权
    Power converter with dead-time variation to disperse distortion 有权

    公开(公告)号：US10270364B2

    公开(公告)日：2019-04-23

    申请号：US14601293

    申请日：2015-01-21

    Applicant: FORD GLOBAL TECHNOLOGIES, LLC

    Inventor： Michael W. Degner ,  Chingchi Chen ,  Jun Kikuchi

    IPC: H02M1/38 ,  H02M7/5387 ,  H02P9/10

    Abstract: A power converter receives a DC supply voltage across a phase leg. The phase leg comprises an upper switching device and a lower switching device coupled across the DC link, wherein a junction between the upper and lower switching devices is configured to be coupled to a load. A gate driver is coupled to the phase leg activating the respective upper switching device according to an upper gate signal and activating the respective lower switching device according to a lower gate signal in response to a pulse-width modulation (PWM) control signal at a PWM frequency. The gate driver shuffles among a plurality of alternate paired sets of dead-time inserted signals. Each paired set of dead-time inserted signals corresponds to a different distortion of a current flowing in the load, so that overall distortion is dispersed.

    Power converter with selective dead-time insertion
    3.
    发明授权
    Power converter with selective dead-time insertion 有权

    公开(公告)号：US09906167B2

    公开(公告)日：2018-02-27

    申请号：US14601282

    申请日：2015-01-21

    Applicant: FORD GLOBAL TECHNOLOGIES, LLC

    Inventor： Michael W. Degner ,  Chingchi Chen ,  Jun Kikuchi

    IPC: H02P3/00 ,  H02M7/5387 ,  H02M1/38

    CPC classification number: H02M7/53871 ,  H02M1/38

    Abstract: A power converter has one or more phase legs, each with upper and lower switching devices. A current sensor detects a magnitude of a current flow from a respective leg. A gate driver activates the upper and lower devices according to gate signals determined in response to a PWM control signal. When the detected current magnitude is greater than a positive threshold then the lower gate signal includes a dead-time insertion and the upper gate signal does not include a dead-time insertion. When the detected current magnitude is less than a negative threshold then the upper gate signal includes a dead-time insertion and the lower gate signal does not include a dead-time insertion. When the detected current magnitude is between the positive threshold and the negative threshold then the upper gate signal and the lower gate signal both include a dead-time insertion. Output distortion and control delay are greatly reduced.

    Power converter with pre-compensation for dead-time insertion
    5.
    发明授权
    Power converter with pre-compensation for dead-time insertion 有权
    电源转换器，具有预补偿功能，用于死区插入

    公开(公告)号：US09553540B2

    公开(公告)日：2017-01-24

    申请号：US14601300

    申请日：2015-01-21

    Applicant: FORD GLOBAL TECHNOLOGIES, LLC

    Inventor： Michael W. Degner ,  Chingchi Chen ,  Jun Kikuchi

    IPC: H02P1/30 ,  H02P1/52 ,  H02P3/00 ,  H02P7/06 ,  H02P27/04 ,  H02P27/08 ,  H02M7/5387 ,  H02M5/458 ,  G01R31/42 ,  G01R19/00 ,  H02M1/38

    CPC classification number: H02P27/08 ,  G01R19/0092 ,  G01R31/42 ,  H02M5/458 ,  H02M7/53875 ,  H02M2001/385 ,  H02P27/04

    Abstract: A power converter has a phase leg with upper and lower switching devices coupled across a DC link. A junction between the devices is coupled to a load. A current sensor detects direction of current flow from the junction to the load. A gate driver activates the devices according to upper and lower gate signals in response to pulse-width modulation (PWM) to generate nominal gate signals from a variable duty cycle. When the positive current direction is detected then the upper gate signal has turn-on and turn-off times shifted by a predetermined offset with respect to the nominal signals, and dead-times are added to the lower gate signals. When the negative direction is detected then the lower gate signal has turn-on and turn-off times shifted by the predetermined offset with respect to the nominal signals, and dead-times are added to the upper gate signals.

    Abstract translation: 功率转换器具有相位支路，上部和下部开关器件跨越DC链路耦合。 设备之间的连接处连接到负载。 电流传感器检测从结到负载的电流的方向。 栅极驱动器响应于脉冲宽度调制（PWM），根据上下栅极信号激活器件，以从可变占空比产生额定栅极信号。 当检测到正电流方向时，上栅极信号的导通和关断时间相对于标称信号偏移了预定的偏移，并且死区时间被加到下栅极信号。 当检测到负方向时，下栅极信号的导通和关断时间相对于标称信号偏移了预定的偏移，并且死区时间被加到上栅极信号。

    MULTILAYERED BUS BAR
    10.
    发明申请
    MULTILAYERED BUS BAR 有权
    多层巴士酒吧

    公开(公告)号：US20150035496A1

    公开(公告)日：2015-02-05

    申请号：US13953806

    申请日：2013-07-30

    Applicant: Ford Global Technologies, LLC

    Inventor： Jun Kikuchi

    IPC: H02G5/00 ,  B60L11/18

    CPC classification number: H02G5/00 ,  B60L11/02 ,  B60L11/1816 ,  Y02T10/70 ,  Y02T10/7005 ,  Y02T10/7072 ,  Y02T10/7077 ,  Y02T90/14

    Abstract: An example multilayered bus bar includes, among other things, a first conductive layer, a second conductive layer, and a third conductive layer. The second conductive layer is sandwiched between the first and third conductive layers. A polarity of the second conductive layer is different than a polarity of the first and third conductive layers.

    Abstract translation: 一个示例性多层母线包括第一导电层，第二导电层和第三导电层。 第二导电层夹在第一和第三导电层之间。 第二导电层的极性与第一和第三导电层的极性不同。

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