Semiconductor device having insulated gate bipolar transistor with dielectric isolation structure
    1.
    发明授权
    Semiconductor device having insulated gate bipolar transistor with dielectric isolation structure 失效
    具有绝缘栅双极晶体管的半导体器件,具有绝缘隔离结构

    公开(公告)号:US06677622B2

    公开(公告)日:2004-01-13

    申请号:US10090823

    申请日:2002-03-06

    IPC分类号: H01L2974

    CPC分类号: H01L29/66325 H01L29/7394

    摘要: A semiconductor substrate is of first-conductivity-type and has a principal surface. A first semiconductor region and a second semiconductor region are of second-conductivity-type and formed apart from each other in the principal surface of the semiconductor substrate. A third semiconductor region is of second-conductivity-type and formed on the first semiconductor region. The third semiconductor region has an impurity concentration higher than that of the first semiconductor region. A fourth semiconductor region is of first-conductivity-type and formed on the third semiconductor region. A first main electrode is formed on the fourth semiconductor region. A second main electrode is formed on the second semiconductor region. A gate electrode is formed, at least on the first semiconductor region and on the principal surface of the semiconductor substrate between the fourth semiconductor region and the second semiconductor region, with a gate insulating film therebetween.

    摘要翻译: 半导体衬底是第一导电型并具有主表面。 第一半导体区域和第二半导体区域是第二导电型并且在半导体衬底的主表面中彼此分开形成。 第三半导体区域是第二导电型并形成在第一半导体区域上。 第三半导体区域的杂质浓度高于第一半导体区域。 第四半导体区域是第一导电型并形成在第三半导体区域上。 第一主电极形成在第四半导体区域上。 第二主电极形成在第二半导体区域上。 至少在第一半导体区域和第四半导体区域与第二半导体区域之间的半导体衬底的主表面上形成栅电极,其间具有栅极绝缘膜。

    Dielectrically isolated IC driver having upper-side and lower-side arm drivers and power IC having the same
    4.
    发明授权
    Dielectrically isolated IC driver having upper-side and lower-side arm drivers and power IC having the same 失效
    具有上侧和下侧臂驱动器的电绝缘IC驱动器和具有该驱动器的功率IC

    公开(公告)号:US06225664B1

    公开(公告)日:2001-05-01

    申请号:US09301596

    申请日:1999-04-29

    IPC分类号: H01L2900

    摘要: In an IC driver using SOI dielectric isolation structure having a lower and an upper arm side drivers, the upper arm side driver operates in a floating state, a carrier injector region is disposed in an semiconductor island where a switching device for the upper-side circuit is formed. The IC driver drives a set of an upper-side and a lower-side output power devices, a first main electrode of the upper-side output power device is connected to a high level power supply, a second main electrode of the upper-side output power device is connected to a first main electrode of the lower-side output power device, a second main electrode of the lower-side output power device is connected to ground potential (GND). The carrier injector region is formed deeper than a couple of main electrode regions of the switching device in the upper arm side driver. Moreover, this injector region is connected to an intermediate potential at connecting terminal of the upper-side and the lower-side output power devices. A current for compensating the displacement current Jd flowing in the parasitic condenser CSUB inherent to the SOI structure is supplied through the carrier injector from this intermediate potential terminal, to diminish the extra load of the internal power supply circuit for supplying the upper arm side driver with a predetermined voltage.

    摘要翻译: 在使用具有下臂和上臂侧驱动器的SOI电介质隔离结构的IC驱动器中,上臂侧驱动器以浮置状态工作,载体注入器区域设置在半导体岛中,其中上侧电路的开关装置 形成了。 IC驱动器驱动一组上侧输出功率器件和下侧输出功率器件,上侧输出功率器件的第一主电极连接到高电平电源,上侧的第二主电极 输出功率器件连接到下侧输出功率器件的第一主电极,下侧输出功率器件的第二主电极接地电位(GND)。 载体喷射器区域形成为比上臂侧驱动器中的开关装置的一对主电极区域更深。 此外,该喷射器区域连接到上侧和下侧输出功率器件的连接端子处的中间电位。 用于补偿在SOI结构固有的寄生电容器CSUB中流动的位移电流Jd的电流通过载体注入器从该中间电位端子提供,以减小用于向上臂侧驱动器供电的内部电源电路的额外负载 预定电压。