公开(公告)号：US09252232B2

公开(公告)日：2016-02-02

申请号：US14640735

申请日：2015-03-06

Applicant: GLOBALFOUNDRIES INC.

Inventor： Michael P. Chudzik ,  Barry P. Linder ,  Shahab Siddiqui

IPC: H01L21/02 ,  H01L27/088 ,  H01L29/51 ,  H01L27/12 ,  H01L21/28 ,  H01L21/324 ,  H01L29/06 ,  H01L29/10 ,  H01L29/16 ,  H01L29/161 ,  H01L29/423 ,  H01L21/8234

CPC classification number: H01L29/513 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/022 ,  H01L21/02236 ,  H01L21/02238 ,  H01L21/02247 ,  H01L21/02249 ,  H01L21/02252 ,  H01L21/02255 ,  H01L21/0228 ,  H01L21/02318 ,  H01L21/02326 ,  H01L21/02329 ,  H01L21/0234 ,  H01L21/2807 ,  H01L21/28185 ,  H01L21/28202 ,  H01L21/324 ,  H01L21/823412 ,  H01L27/088 ,  H01L27/1203 ,  H01L29/0649 ,  H01L29/1033 ,  H01L29/16 ,  H01L29/161 ,  H01L29/42364 ,  H01L29/518

Abstract: A gate dielectric can be formed by depositing a first silicon oxide material by a first atomic layer deposition process. The thickness of the first silicon oxide material is selected to correspond to at least 10 deposition cycles of the first atomic layer deposition process. The first silicon oxide material is converted into a first silicon oxynitride material by a first plasma nitridation process. A second silicon oxide material is subsequently deposited by a second atomic layer deposition process. The second silicon oxide material is converted into a second silicon oxynitride material by a second plasma nitridation process. Multiple repetitions of the atomic layer deposition process and the plasma nitridation process provides a silicon oxynitride material having a ratio of nitrogen atoms to oxygen atoms greater than 1/3, which can be advantageously employed to reduce the leakage current through a gate dielectric.

公开(公告)号：US10103060B2

公开(公告)日：2018-10-16

申请号：US14742895

申请日：2015-06-18

Applicant: GLOBALFOUNDRIES INC.

Inventor： David G. Brochu, Jr. ,  Roger A. Dufresne ,  Baozhen Li ,  Barry P. Linder ,  James H. Stathis ,  Ernest Y. Wu

IPC: H01L21/768 ,  H01L21/66 ,  G01R31/44 ,  G01R27/26 ,  G01R31/28

Abstract: Methods and test structures for testing the reliability of a dielectric material. The test structure may include a first row of contacts and a line comprised of a conductor. The line is laterally spaced in a direction at a minimum distance from the first row of contacts. The test structure further includes a second row of contacts laterally spaced in the direction from the first row of contacts by a distance equal to two times a minimum pitch. The line is laterally positioned between the first row of contacts and the second row of contacts.

公开(公告)号：US20160372389A1

公开(公告)日：2016-12-22

申请号：US14742895

申请日：2015-06-18

Applicant: GLOBALFOUNDRIES INC.

Inventor： David G. Brochu, JR. ,  Roger A. Dufresne ,  Baozhen Li ,  Barry P. Linder ,  James H. Stathis ,  Ernest Y. Wu

IPC: H01L21/66 ,  H01L21/768 ,  H01L29/66 ,  G01R31/28 ,  H01L21/28

CPC classification number: H01L21/76885 ,  G01R27/2617 ,  G01R31/2856 ,  G01R31/44 ,  H01L22/34

Abstract: Methods and test structures for testing the reliability of a dielectric material. The test structure may include a first row of contacts and a line comprised of a conductor. The line is laterally spaced in a direction at a minimum distance from the first row of contacts. The test structure further includes a second row of contacts laterally spaced in the direction from the first row of contacts by a distance equal to two times a minimum pitch. The line is laterally positioned between the first row of contacts and the second row of contacts.

Abstract translation: 用于测试电介质材料可靠性的方法和测试结构。 测试结构可以包括第一行触点和由导体组成的线。 该线在与第一排触点最小距离的方向上横向隔开。 测试结构还包括第二排触点，其在与第一触点排的方向上横向间隔开等于最小间距的两倍的距离。 该线横向地位于第一排触点和第二排触点之间。

公开(公告)号：US09196700B2

公开(公告)日：2015-11-24

申请号：US14640698

申请日：2015-03-06

Applicant: GLOBALFOUNDRIES INC.

Inventor： Michael P. Chudzik ,  Barry P. Linder ,  Shahab Siddiqui

IPC: H01L21/02 ,  H01L29/51 ,  H01L27/088 ,  H01L27/12 ,  H01L21/28 ,  H01L21/324 ,  H01L29/06 ,  H01L29/10 ,  H01L29/16 ,  H01L29/161 ,  H01L29/423 ,  H01L21/8234

CPC classification number: H01L29/513 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/022 ,  H01L21/02236 ,  H01L21/02238 ,  H01L21/02247 ,  H01L21/02249 ,  H01L21/02252 ,  H01L21/02255 ,  H01L21/0228 ,  H01L21/02318 ,  H01L21/02326 ,  H01L21/02329 ,  H01L21/0234 ,  H01L21/2807 ,  H01L21/28185 ,  H01L21/28202 ,  H01L21/324 ,  H01L21/823412 ,  H01L27/088 ,  H01L27/1203 ,  H01L29/0649 ,  H01L29/1033 ,  H01L29/16 ,  H01L29/161 ,  H01L29/42364 ,  H01L29/518

Abstract: A gate dielectric can be formed by depositing a first silicon oxide material by a first atomic layer deposition process. The thickness of the first silicon oxide material is selected to correspond to at least 10 deposition cycles of the first atomic layer deposition process. The first silicon oxide material is converted into a first silicon oxynitride material by a first plasma nitridation process. A second silicon oxide material is subsequently deposited by a second atomic layer deposition process. The second silicon oxide material is converted into a second silicon oxynitride material by a second plasma nitridation process. Multiple repetitions of the atomic layer deposition process and the plasma nitridation process provides a silicon oxynitride material having a ratio of nitrogen atoms to oxygen atoms greater than 1/3, which can be advantageously employed to reduce the leakage current through a gate dielectric.

Abstract translation: 可以通过利用第一原子层沉积工艺沉积第一氧化硅材料来形成栅极电介质。 选择第一氧化硅材料的厚度以对应于第一原子层沉积工艺的至少10个沉积循环。 通过第一等离子体氮化工艺将第一氧化硅材料转化为第一氮氧化硅材料。 随后通过第二原子层沉积工艺沉积第二氧化硅材料。 通过第二等离子体氮化处理将第二氧化硅材料转化为第二氮氧化硅材料。 原子层沉积工艺和等离子体氮化处理的多次重复提供氮氮原子与氧原子的比率大于1/3的氮氧化硅材料，其可以有利地用于减少通过栅极电介质的漏电流。