公开(公告)号：US20160118138A1

公开(公告)日：2016-04-28

申请号：US14522017

申请日：2014-10-23

Applicant: GLOBALFOUNDRIES INC.

Inventor： Ephrem G. Gebreselasie ,  Alain Loiseau ,  Joseph M. Lukaitis ,  Richard A. Poro, III ,  Andreas D. Stricker

IPC: G11C17/16 ,  G06F17/50 ,  H03K19/177

CPC classification number: G11C17/16 ,  G11C17/18 ,  H03K19/17768

Abstract: Circuits for programming an electrical fuse, methods for programming an electrical fuse, and methods for designing a silicon-controlled rectifier for use in programming an electrical fuse. A programming current for the electrical fuse is directed through the electrical fuse and the silicon-controlled rectifier. Upon reaching a programmed resistance value for the electrical fuse, the silicon-controlled rectifier switches from a low-impedance state to a high-impedance state that interrupts the programming current.

Abstract translation: 用于编程电熔丝的电路，用于编程电熔丝的方法以及用于设计用于编程电熔丝的硅控整流器的方法。 电熔丝的编程电流通过电熔丝和可控硅整流器引导。 当达到电熔丝的编程电阻值时，硅控整流器从低阻抗状态切换到中断编程电流的高阻态。

公开(公告)号：US20170178704A1

公开(公告)日：2017-06-22

申请号：US14971644

申请日：2015-12-16

Applicant: GLOBALFOUNDRIES INC.

Inventor： Alain F. LOISEAU ,  Joseph M. Lukaitis ,  Ephrem G. Gebreselasie ,  Richard A. Poro ,  Andreas D. Stricker ,  Ahmed Y. Ginawi

IPC: G11C7/24 ,  H01L27/06 ,  H01L23/525 ,  H01L27/112 ,  H01L27/02

CPC classification number: G11C7/24 ,  G11C5/005 ,  G11C17/16 ,  H01L23/5256 ,  H01L27/0255 ,  H01L27/0266 ,  H01L27/0617 ,  H01L27/11206

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to electrostatic discharge (ESD) protection structures for eFuses. The structure includes an electrostatic discharge (ESD) protection structure operatively coupled to an eFuse, which is structured to prevent unintentional programming of the eFuse due to an ESD event originating at a source.

公开(公告)号：US20190214381A1

公开(公告)日：2019-07-11

申请号：US15866999

申请日：2018-01-10

Applicant: GLOBALFOUNDRIES INC.

Inventor： Ahmed Y. GINAWI ,  Andreas D. Stricker ,  Alain F. Loiseau ,  Ephrem G. Gebreselasie ,  Joseph M. Lukaitis ,  Richard A. Poro, III

IPC: H01L27/02 ,  H02H9/04

CPC classification number: H01L27/0266 ,  H01L27/0292 ,  H01L27/0296 ,  H02H9/044 ,  H02H9/046

Abstract: The present disclosure relates to an electrostatic discharge (ESD) clamp and, more particularly, to an ESD clamp with reduced off-state power consumption. The structure includes: one or more inverters connected to a timing circuit; a first transistor receiving an output signal from a last of the one or more inverters and an output signal from the timing circuit; a second transistor with its gate connected to the first transistor, in series; and a voltage node providing a separate voltage to a gate of the second transistor.

公开(公告)号：US10263418B2

公开(公告)日：2019-04-16

申请号：US15971265

申请日：2018-05-04

Applicant: GLOBALFOUNDRIES INC.

Inventor： Ephrem G. Gebreselasie ,  Icko E. T. Iben ,  Alain Loiseau

IPC: H02H9/04

Abstract: ESD protection circuitry that includes one, or more, of the following features, characteristics and/or advantages: (i) use of different “diode types” (for example, Schottky type, PN type, p-type diode-connected field-effect transistor (FET) type, NFET type)) in a series-connected diode set (connected in series with respect to a device-under-protection) and a parallel-connected diode set (connected in parallel with respect to a device-under-protection and the series-connected diode set); (ii) a FET is connected in series with a target device such that the FET's gate can be turned on during normal operation and the FET's gate is resistively coupled to the FET's source; and/or (iii) two FETs are connected in series with a target device such both FETs gates can be turned on during normal operation, one FET's gate is resistively coupled to its source, and the other FET's gate is electrically coupled to its drain.

公开(公告)号：US20180254630A1

公开(公告)日：2018-09-06

申请号：US15971265

申请日：2018-05-04

Applicant: GLOBALFOUNDRIES INC.

Inventor： Ephrem G. Gebreselasie ,  Icko E. T. Iben ,  Alain Loiseau

IPC: H02H9/04

CPC classification number: H02H9/041

Abstract: ESD protection circuitry that includes one, or more, of the following features, characteristics and/or advantages: (i) use of different “diode types” (for example, Schottky type, PN type, p-type diode-connected field-effect transistor (FET) type, NFET type)) in a series-connected diode set (connected in series with respect to a device-under-protection) and a parallel-connected diode set (connected in parallel with respect to a device-under-protection and the series-connected diode set); (ii) a FET is connected in series with a target device such that the FET's gate can be turned on during normal operation and the FET's gate is resistively coupled to the FET's source; and/or (iii) two FETs are connected in series with a target device such both FETs gates can be turned on during normal operation, one FET's gate is resistively coupled to its source, and the other FET's gate is electrically coupled to its drain.

公开(公告)号：US09940986B2

公开(公告)日：2018-04-10

申请号：US14971644

申请日：2015-12-16

Applicant: GLOBALFOUNDRIES INC.

Inventor： Alain F. Loiseau ,  Joseph M. Lukaitis ,  Ephrem G. Gebreselasie ,  Richard A. Poro ,  Andreas D. Stricker ,  Ahmed Y. Ginawi

IPC: H02H9/04 ,  G11C7/24 ,  H01L23/525 ,  H01L27/02 ,  H01L27/06 ,  H01L27/112 ,  G11C5/00 ,  G11C17/16

CPC classification number: G11C7/24 ,  G11C5/005 ,  G11C17/16 ,  H01L23/5256 ,  H01L27/0255 ,  H01L27/0266 ,  H01L27/0617 ,  H01L27/11206

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to electrostatic discharge (ESD) protection structures for eFuses. The structure includes an electrostatic discharge (ESD) protection structure operatively coupled to an eFuse, which is structured to prevent unintentional programming of the eFuse due to an ESD event originating at a source.

公开(公告)号：US09318217B1

公开(公告)日：2016-04-19

申请号：US14522017

申请日：2014-10-23

Applicant: GLOBALFOUNDRIES INC.

Inventor： Ephrem G. Gebreselasie ,  Alain Loiseau ,  Joseph M. Lukaitis ,  Richard A. Poro, III ,  Andreas D. Stricker

IPC: H01H37/76 ,  G11C17/16 ,  H03K19/177 ,  G06F17/50

CPC classification number: G11C17/16 ,  G11C17/18 ,  H03K19/17768

Abstract: Circuits for programming an electrical fuse, methods for programming an electrical fuse, and methods for designing a silicon-controlled rectifier for use in programming an electrical fuse. A programming current for the electrical fuse is directed through the electrical fuse and the silicon-controlled rectifier. Upon reaching a programmed resistance value for the electrical fuse, the silicon-controlled rectifier switches from a low-impedance state to a high-impedance state that interrupts the programming current.

Abstract translation: 用于编程电熔丝的电路，用于编程电熔丝的方法以及用于设计用于编程电熔丝的硅控整流器的方法。 电熔丝的编程电流通过电熔丝和可控硅整流器引导。 当达到电熔丝的编程电阻值时，硅控整流器从低阻抗状态切换到中断编程电流的高阻抗状态。