公开(公告)号：US09461050B2

公开(公告)日：2016-10-04

申请号：US14098639

申请日：2013-12-06

Applicant: GLOBALFOUNDRIES INC.

Inventor： Byeong Y. Kim ,  Dan M. Mocuta

IPC: H01L27/108 ,  H01L29/78 ,  H01L29/66 ,  H01L21/308

CPC classification number: H01L27/10832 ,  H01L21/3086 ,  H01L27/10826 ,  H01L27/10858 ,  H01L27/10867 ,  H01L27/1087 ,  H01L27/10879 ,  H01L29/6656 ,  H01L29/785

Abstract: A self-aligned strap structure can be formed by forming trench capacitors and overlying trench top conductive material portions. End portions of fin mask structures overlie portions of the trench top conductive material portions. A dielectric spacer is formed around each end portions of the fin mask structure to cover additional areas of the trench top conductive material portions. An anisotropic etch is performed to recess portions of the trench top conductive material portions that are not covered by the fin mask structures or dielectric spacers. Conductive strap structures that are self-aligned to end portions of semiconductor fins are formed simultaneously with formation of the semiconductor fins. Access fin field effect transistors can be subsequently formed.

Abstract translation: 可以通过形成沟槽电容器和覆盖沟槽顶部导电材料部分来形成自对准带结构。 翅片掩模结构的端部覆盖在沟槽顶部导电材料部分的部分上。 围绕翅片掩模结构的每个端部形成介电隔离件以覆盖沟槽顶部导电材料部分的附加区域。 执行各向异性蚀刻以凹陷未被翅片掩模结构或电介质间隔物覆盖的沟槽顶部导电材料部分的部分。 与半导体翅片的端部自对准的导电带结构同时形成半导体翅片。 可以随后形成接入鳍场效应晶体管。

公开(公告)号：US09825041B1

公开(公告)日：2017-11-21

申请号：US15236608

申请日：2016-08-15

Applicant: GLOBALFOUNDRIES INC.

Inventor： William L. Nicoll ,  Byeong Y. Kim

IPC: H01L27/108 ,  H01L27/12 ,  H01L29/792 ,  H01L29/78 ,  H01L29/51 ,  H01L21/311

CPC classification number: H01L27/10826 ,  H01L27/10879 ,  H01L27/10891 ,  H01L27/1211 ,  H01L29/785

Abstract: Various embodiments include methods and integrated circuit (IC) structures. In some cases, an IC can include: a substrate; a deep trench within the substrate; a buried oxide (BOX) layer adjacent the deep trench; a first fin structure over the deep trench; a second fin structure over the BOX layer; an ONO layer over the first fin structure; and a gate electrode contacting the ONO layer.

公开(公告)号：US09607993B1

公开(公告)日：2017-03-28

申请号：US15007937

申请日：2016-01-27

Applicant: GLOBALFOUNDRIES INC.

Inventor： Byeong Y. Kim ,  William L. Nicoll

IPC: H01L29/94 ,  H01L27/108

CPC classification number: H01L27/10867 ,  H01L27/10826 ,  H01L27/10829 ,  H01L27/10879 ,  H01L27/1211 ,  H01L29/66795 ,  H01L29/945

Abstract: Capacitor strap connections for a memory cell and device structures for making such capacitor strap connections. A deep trench capacitor is formed in a substrate. A collar comprised of an electrical insulator is formed at least partially inside an upper section of a deep trench in which the deep trench capacitor is formed. A portion of the collar is removed to define a notch extending through the collar, and a connection strap is formed in the notch. A fin is formed from a portion of the substrate, and is coupled by the connection strap with an electrode of the deep trench capacitor that is located inside the deep trench.

公开(公告)号：US20180047807A1

公开(公告)日：2018-02-15

申请号：US15233229

申请日：2016-08-10

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Herbert L. Ho ,  Byeong Y. Kim ,  Joyce C. Liu

IPC: H01L49/02 ,  H01L21/768 ,  H01L21/285 ,  H01L27/06 ,  H01L23/535 ,  H01L21/02

CPC classification number: H01L28/60 ,  H01L21/02271 ,  H01L27/0629 ,  H01L27/10861 ,  H01L29/945

Abstract: Device structures for a deep trench capacitor and methods of fabricating device structures for a deep trench capacitor. A dielectric layer is formed on a substrate and an opening is formed that extends from a top surface of the dielectric layer through the dielectric layer. A deep trench is formed in the substrate and is aligned with the opening in the dielectric layer. A plate of a deep trench capacitor is formed that is located at least partially inside the deep trench and at least partially inside the opening in the dielectric layer. A diffusion pad is formed that arranged at the top surface of the dielectric layer relative to the opening such that the diffusion pad is coupled with the plate of the deep trench capacitor.

公开(公告)号：US09379116B1

公开(公告)日：2016-06-28

申请号：US14642909

申请日：2015-03-10

Applicant: GLOBALFOUNDRIES INC.

Inventor： Byeong Y. Kim

IPC: H01L27/108 ,  H01L21/84 ,  H01L29/66 ,  H01L21/311 ,  H01L21/306 ,  H01L27/102 ,  H01L27/07

CPC classification number: H01L27/10879 ,  H01L21/3086 ,  H01L21/32139 ,  H01L21/845 ,  H01L27/0733 ,  H01L27/1026 ,  H01L27/10805 ,  H01L27/10826 ,  H01L27/10829 ,  H01L27/10858 ,  H01L27/10861 ,  H01L27/10867 ,  H01L27/1211 ,  H01L29/945

Abstract: A method including forming a buffer layer between a top pad layer and a bottom pad layer all above a deep trench capacitor embedded in a substrate, forming a fin pattern, defined by one or more sidewall spacers, above the top pad layer using a sidewall image transfer technique, transferring the fin pattern into the top pad layer stopping of the buffer layer, and forming a fin in direct contact with a strap by transferring the fin pattern into the buffer layer, into the bottom pad layer, and into the substrate and an inner electrode of the deep trench capacitor, the fin is formed from a portion of the substrate and the strap is formed from a portion of the inner electrode of the deep trench capacitor.

Abstract translation: 一种方法，包括在顶部衬垫层和底部衬垫层之间形成缓冲层，所述缓冲层全部位于嵌入衬底中的深沟槽电容器上方，使用侧壁图像在顶部衬垫层上方形成由一个或多个侧壁间隔物限定的鳍状图案 传送技术，将鳍状图案转移到缓冲层的顶部衬垫层停止中，并且通过将鳍状图案转移到缓冲层中而形成与带直接接触的翅片，进入底部衬垫层和衬底中，并且 深沟槽电容器的内部电极，翅片由基板的一部分形成，并且带由深沟槽电容器的内部电极的一部分形成。