Abstract:
A method of fabricating raised fin structures is provided, the fabricating including: providing a substrate and at least one dielectric layer over the substrate; forming a trench in the at least one dielectric layer, the trench having a lower portion, a lateral portion, and an upper portion, the upper portion being at least partially laterally offset from the lower portion and being joined to the lower portion by the lateral portion; and, growing a material in the trench to form the raised fin structure, wherein the trench is formed to ensure that any growth defect in the lower portion of the trench terminates either in the lower portion or the lateral portion of the trench and does not extend into the upper portion of the trench.
Abstract:
One illustrative method disclosed herein includes, among other things, forming a fin-removal masking layer comprised of a plurality of line-type features, each of which is positioned above one of the fins, and a masking material positioned at least between adjacent features of the fin-removal masking layer and above portions of an insulating material in the trenches between the fins. The method also includes performing an anisotropic etching process through the fin-removal masking layer to remove the portions of the fins to be removed.
Abstract:
FinFET devices and methods of fabricating a FinFET device are provided. An exemplary method of fabricating a FinFET device includes providing a semiconductor substrate with a plurality of fins and a multi-layered hardmask stack formed thereover. The multi-layered hardmask stack is patterned to form a patterned multi-layered hardmask stack having a tapered fin masking configuration with a shortened region and an elongated region. A region of fins adjacent to the shortened region is masked with a second mask. The region of fins masked with the second mask is free from the patterned multi-layered hardmask stack. Fins in unmasked areas are etched after forming the second mask. The second mask is removed with at least one layer of the patterned multi-layered hardmask stack remaining after etching the fins in the unmasked areas. End portions of the fins adjacent to the shortened region are etched after removing the second mask.
Abstract:
FinFET devices and methods of fabricating a FinFET device are provided. An exemplary method of fabricating a FinFET device includes providing a semiconductor substrate with a plurality of fins and a multi-layered hardmask stack formed thereover. The multi-layered hardmask stack is patterned to form a patterned multi-layered hardmask stack having a tapered fin masking configuration with a shortened region and an elongated region. A region of fins adjacent to the shortened region is masked with a second mask. The region of fins masked with the second mask is free from the patterned multi-layered hardmask stack. Fins in unmasked areas are etched after forming the second mask. The second mask is removed with at least one layer of the patterned multi-layered hardmask stack remaining after etching the fins in the unmasked areas. End portions of the fins adjacent to the shortened region are etched after removing the second mask.
Abstract:
A method includes forming a plurality of fins above a substrate. A first mask layer is formed above a first subset of the fins. First portions of the fins in the first subset exposed by a first opening in the first mask layer are removed to define, for each of the fins, a first fin segment and a second fin segment, each having a cut end surface. A first liner layer is formed on at least the cut end surface of the first fin segment for each of the fins in the first subset. A second mask layer having a second opening is formed above a second subset of the plurality of fins. An etching process removes second portions of the second subset of fins exposed by the second opening. The first liner layer protects the cut end surface of at least the first fin segment during the removing.
Abstract:
A method includes forming a plurality of fins above a substrate. A plurality of gate structures is formed above the plurality of fins. A first mask layer is formed above the plurality of fins and the plurality of gate structures. The first mask layer has at least one fin cut opening and at least one gate cut opening defined therein. A first portion of a first fin of the plurality of fins disposed below the fin cut opening is removed to define a fin cut cavity. A second portion of a first gate structure of the plurality of gate structures disposed below the gate cut opening is removed to define a gate cut cavity. An insulating material layer is concurrently formed in at least a portion of the fin cut cavity and the gate cut cavity.
Abstract:
Methods for a lithographic process used to pattern fins for fin-type field-effect transistors (FinFETs). A first plurality of hardmask sections may be formed, and sacrificial spacers may be formed on vertical sidewalls of the first plurality of hardmask sections. Each of the first plurality of hardmask sections is comprised of a first material. Gaps between the sacrificial spacers are filled with a second material, which is selected to etch selectively to the first material, in order to define a second plurality of hardmask sections each comprised of the second material.
Abstract:
One illustrative method disclosed herein includes, among other things, forming a fin-removal masking layer comprised of a plurality of line-type features, each of which is positioned above one of the fins, and a masking material positioned at least between adjacent features of the fin-removal masking layer and above portions of an insulating material in the trenches between the fins. The method also includes performing an anisotropic etching process through the fin-removal masking layer to remove the portions of the fins to be removed.
Abstract:
A method includes forming a plurality of fins above a substrate. A first mask layer is formed above a first subset of the fins. First portions of the fins in the first subset exposed by a first opening in the first mask layer are removed to define, for each of the fins, a first fin segment and a second fin segment, each having a cut end surface. A first liner layer is formed on at least the cut end surface of the first fin segment for each of the fins in the first subset. A second mask layer having a second opening is formed above a second subset of the plurality of fins. An etching process removes second portions of the second subset of fins exposed by the second opening. The first liner layer protects the cut end surface of at least the first fin segment during the removing.
Abstract:
A method includes forming a plurality of fins above a substrate. A plurality of gate structures is formed above the plurality of fins. A first mask layer is formed above the plurality of fins and the plurality of gate structures. The first mask layer has at least one fin cut opening and at least one gate cut opening defined therein. A first portion of a first fin of the plurality of fins disposed below the fin cut opening is removed to define a fin cut cavity. A second portion of a first gate structure of the plurality of gate structures disposed below the gate cut opening is removed to define a gate cut cavity. An insulating material layer is concurrently formed in at least a portion of the fin cut cavity and the gate cut cavity.