公开(公告)号：US20140353805A1

公开(公告)日：2014-12-04

申请号：US13903618

申请日：2013-05-28

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Errol Todd RYAN ,  Moosung M. CHAE ,  Larry ZHAO ,  Kunaljeet TANWAR ,  Nicholas Vincent LICAUSI ,  Christian WITT ,  Ailian ZHAO ,  Ming HE ,  Sean X. LIN ,  Xunyuan ZHANG

IPC: H01L21/3105 ,  H01L23/00

CPC classification number: H01L21/02101 ,  H01L21/02063 ,  H01L21/76814

Abstract: A process is provided for the removal of contaminants from a semiconductor device, for example, removing contaminants from pores of an ultra-low k film. In one aspect, a method includes: providing a dielectric layer with contaminant-containing pores and exposing the dielectric layer to a supercritical fluid. The supercritical fluid can dissolve and remove the contaminants. In another aspect, an intermediate semiconductor device structure is provided that contains a dielectric layer with contaminant-containing pores and a supercritical fluid within the pores. In another aspect, a semiconductor device structure with a dielectric layer containing uncontaminated pores is provided.

Abstract translation: 提供了用于从半导体器件去除污染物的方法，例如从超低k膜的孔中除去污染物。 一方面，一种方法包括：向电介质层提供含有污染物的孔，并将介电层暴露于超临界流体。 超临界流体可以溶解和去除污染物。 在另一方面，提供了一种中间半导体器件结构，其包含具有含污染孔的电介质层和孔内的超临界流体。 另一方面，提供了具有含有未污染孔的电介质层的半导体器件结构。

公开(公告)号：US20140353802A1

公开(公告)日：2014-12-04

申请号：US13903802

申请日：2013-05-28

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Nicholas Vincent LICAUSI ,  Errol Todd RYAN ,  Ming HE ,  Moosung M. CHAE ,  Kunaljeet TANWAR ,  Larry ZHAO ,  Christian WITT ,  Ailian ZHAO ,  Sean X. LIN ,  Xunyuan ZHANG

IPC: H01L21/314 ,  H01L21/32 ,  H01L21/308 ,  H01L29/06

CPC classification number: H01L21/314 ,  H01L21/308 ,  H01L21/3105 ,  H01L21/31144 ,  H01L21/32 ,  H01L21/76814 ,  H01L21/7682 ,  H01L21/76825 ,  H01L21/76826 ,  H01L21/76829 ,  H01L21/76831 ,  H01L29/06 ,  H01L2221/1047

Abstract: A process is provided for methods of reducing damage to an ultra-low k layer during fabrication. In one aspect, a method includes: providing a cured ultra-low k film containing pores filled with a pore-stuffing material; and modifying an exposed surface of the ultra-low k film to provide a modified layer in the ultra-low k film. In another aspect, a semiconductor device comprising a modified layer on a surface of an ultra-low k film is provided.

Abstract translation: 提供了一种在制造期间减少对超低k层的损伤的方法的方法。 一方面，一种方法包括：提供含有填充有孔填充材料的孔的固化的超低k膜; 以及改变超低k膜的暴露表面以在超低k膜中提供改性层。 在另一方面，提供一种在超低k膜的表面上包含改性层的半导体器件。

公开(公告)号：US20140353835A1

公开(公告)日：2014-12-04

申请号：US13903283

申请日：2013-05-28

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Moosung M. CHAE ,  Errol Todd RYAN ,  Nicholas Vincent LICAUSI ,  Christian WITT ,  Ailian ZHAO ,  Ming HE ,  Sean X. LIN ,  Xunyuan ZHANG ,  Kunaljeet TANWAR

IPC: H01L21/768 ,  H01L23/48

CPC classification number: H01L21/76831 ,  H01L21/02203 ,  H01L21/3105 ,  H01L21/31695 ,  H01L21/7682 ,  H01L21/76843 ,  H01L2221/1047

Abstract: A process is provided for methods of reducing contamination of the self-forming barrier of an ultra-low k layer during semiconductor fabrication. In one aspect, a method includes: providing a cured ultra-low k film which contains at least one trench, and the pores of the film are filled with a pore-stuffing material; removing exposed pore-stuffing material at the surface of the trench to form exposed pores; and forming a self-forming barrier layer on the surface of the trench.

Abstract translation: 提供了一种用于在半导体制造期间减少超低k层的自形成势垒的污染的方法的方法。 一方面，一种方法包括：提供包含至少一个沟槽的固化的超低k膜，并且用孔填充材料填充膜的孔; 在沟槽的表面去除暴露的孔隙填充材料以形成暴露的孔; 并在沟槽的表面上形成自形成阻挡层。

公开(公告)号：US20150130063A1

公开(公告)日：2015-05-14

申请号：US14550531

申请日：2014-11-21

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Xunyuan ZHANG ,  Kunaljeet TANWAR

IPC: H01L23/532

CPC classification number: H01L23/53238 ,  H01L21/76831 ,  H01L21/76834 ,  H01L21/7684 ,  H01L21/76846 ,  H01L21/76855 ,  H01L21/76877 ,  H01L21/76879 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of forming a doped TaN Cu barrier adjacent to a Ru layer of a Cu interconnect structure and the resulting device are provided. Embodiments include forming a cavity in a SiO-based ILD; conformally forming a doped TaN layer in the cavity and over the ILD; conformally forming a Ru layer on the doped TaN layer; depositing Cu over the Ru layer and filling the cavity; planarizing the Cu, Ru layer, and doped TaN layer down to an upper surface of the ILD; forming a dielectric cap over the Cu, Ru layer, and doped TaN layer; and filling spaces formed between the dielectric cap and the doped TaN layer

Abstract translation: 提供了形成与Cu互连结构的Ru层相邻的掺杂TaN Cu势垒的方法和所得到的器件。 实施例包括在SiO基ILD中形成空腔; 在空腔中并在ILD上保形地形成掺杂的TaN层; 在掺杂的TaN层上保形地形成Ru层; 在Ru层上沉积Cu并填充空腔; 将Cu，Ru层和掺杂的TaN层平坦化到ILD的上表面; 在Cu，Ru层和掺杂的TaN层上形成电介质盖; 以及形成在电介质盖和掺杂的TaN层之间的填充空间