公开(公告)号：US20150137372A1

公开(公告)日：2015-05-21

申请号：US14080864

申请日：2013-11-15

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Moosung M. CHAE

IPC: H01L21/4763 ,  H01L21/768

CPC classification number: H01L21/76885 ,  H01L21/76834 ,  H01L21/76855

Abstract: Methods for forming a self-forming barrier layer and the resulting devices are disclosed. Embodiments may include forming a metal line above a substrate, forming a reagent layer above the metal line and the substrate, forming a dielectric layer on the reagent layer, and transforming the reagent layer into a self-forming barrier layer.

Abstract translation: 公开了形成自形成阻挡层的方法和所得到的器件。 实施例可以包括在基板上形成金属线，在金属线上方形成试剂层和基板，在试剂层上形成电介质层，将试剂层转化为自形成阻挡层。

公开(公告)号：US20140353805A1

公开(公告)日：2014-12-04

申请号：US13903618

申请日：2013-05-28

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Errol Todd RYAN ,  Moosung M. CHAE ,  Larry ZHAO ,  Kunaljeet TANWAR ,  Nicholas Vincent LICAUSI ,  Christian WITT ,  Ailian ZHAO ,  Ming HE ,  Sean X. LIN ,  Xunyuan ZHANG

IPC: H01L21/3105 ,  H01L23/00

CPC classification number: H01L21/02101 ,  H01L21/02063 ,  H01L21/76814

Abstract: A process is provided for the removal of contaminants from a semiconductor device, for example, removing contaminants from pores of an ultra-low k film. In one aspect, a method includes: providing a dielectric layer with contaminant-containing pores and exposing the dielectric layer to a supercritical fluid. The supercritical fluid can dissolve and remove the contaminants. In another aspect, an intermediate semiconductor device structure is provided that contains a dielectric layer with contaminant-containing pores and a supercritical fluid within the pores. In another aspect, a semiconductor device structure with a dielectric layer containing uncontaminated pores is provided.

Abstract translation: 提供了用于从半导体器件去除污染物的方法，例如从超低k膜的孔中除去污染物。 一方面，一种方法包括：向电介质层提供含有污染物的孔，并将介电层暴露于超临界流体。 超临界流体可以溶解和去除污染物。 在另一方面，提供了一种中间半导体器件结构，其包含具有含污染孔的电介质层和孔内的超临界流体。 另一方面，提供了具有含有未污染孔的电介质层的半导体器件结构。

公开(公告)号：US20160268195A1

公开(公告)日：2016-09-15

申请号：US14656770

申请日：2015-03-13

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Ki Young LEE ,  Moosung M. CHAE ,  Woo Sik KIM

IPC: H01L23/522 ,  H01L49/02 ,  H01L23/532 ,  H01L21/768 ,  H01L21/02

CPC classification number: H01L23/5227 ,  H01L21/02126 ,  H01L21/02362 ,  H01L21/76802 ,  H01L21/76843 ,  H01L21/76877 ,  H01L23/5226 ,  H01L23/53238 ,  H01L23/53252 ,  H01L23/53266 ,  H01L23/53295 ,  H01L28/10

Abstract: Integrated circuits with single core inductors and methods for producing them are provided. Embodiments include forming a trench in a dielectric layer; forming a first metal-oxide hard mask by disposing a metal hard mask and an oxide hard mask over the dielectric layer and in strips in the trench; forming metal line trenches through the first metal-oxide hard mask and into the first dielectric layer on opposite sides of the inductor trench and first vias; filling the first metal line trenches, first vias, and trench; forming another dielectric layer and a second metal-oxide hard mask over the filled trench; forming a second trench through the second metal-oxide hard mask and into the second dielectric layer and second metal line trenches and second vias; and filling the second metal line trenches, second vias, and second trench.

Abstract translation: 提供具有单芯电感器的集成电路及其制造方法。 实施例包括在电介质层中形成沟槽; 通过在所述电介质层上设置金属硬掩模和氧化物硬掩模，并且在所述沟槽中以条状形成第一金属氧化物硬掩模; 通过所述第一金属氧化物硬掩模形成金属线沟槽并进入所述电感器沟槽和第一通孔的相对侧上的第一介电层; 填充第一金属线沟槽，第一通孔和沟槽; 在填充的沟槽上形成另一介电层和第二金属氧化物硬掩模; 通过第二金属氧化物硬掩模形成第二沟槽并形成第二介电层和第二金属线沟槽和第二通孔; 以及填充第二金属线沟槽，第二通孔和第二沟槽。

公开(公告)号：US20140353802A1

公开(公告)日：2014-12-04

申请号：US13903802

申请日：2013-05-28

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Nicholas Vincent LICAUSI ,  Errol Todd RYAN ,  Ming HE ,  Moosung M. CHAE ,  Kunaljeet TANWAR ,  Larry ZHAO ,  Christian WITT ,  Ailian ZHAO ,  Sean X. LIN ,  Xunyuan ZHANG

IPC: H01L21/314 ,  H01L21/32 ,  H01L21/308 ,  H01L29/06

CPC classification number: H01L21/314 ,  H01L21/308 ,  H01L21/3105 ,  H01L21/31144 ,  H01L21/32 ,  H01L21/76814 ,  H01L21/7682 ,  H01L21/76825 ,  H01L21/76826 ,  H01L21/76829 ,  H01L21/76831 ,  H01L29/06 ,  H01L2221/1047

Abstract: A process is provided for methods of reducing damage to an ultra-low k layer during fabrication. In one aspect, a method includes: providing a cured ultra-low k film containing pores filled with a pore-stuffing material; and modifying an exposed surface of the ultra-low k film to provide a modified layer in the ultra-low k film. In another aspect, a semiconductor device comprising a modified layer on a surface of an ultra-low k film is provided.

Abstract translation: 提供了一种在制造期间减少对超低k层的损伤的方法的方法。 一方面，一种方法包括：提供含有填充有孔填充材料的孔的固化的超低k膜; 以及改变超低k膜的暴露表面以在超低k膜中提供改性层。 在另一方面，提供一种在超低k膜的表面上包含改性层的半导体器件。

公开(公告)号：US20180166383A1

公开(公告)日：2018-06-14

申请号：US15377592

申请日：2016-12-13

Applicant: GLOBALFOUNDRIES INC.

Inventor： Huy CAO ,  Zhiguo SUN ,  Joseph F. SHEPARD, JR. ,  Moosung M. CHAE

IPC: H01L23/528 ,  H01L23/532 ,  H01L21/768

CPC classification number: H01L23/5283 ,  H01L21/7682 ,  H01L23/5222 ,  H01L23/53238 ,  H01L23/5329 ,  H01L23/53295

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to airgaps which isolate metal lines and methods of manufacture. The structure includes: a plurality of metal lines formed on an insulator layer; and a dielectric material completely filling a space having a first dimension between metal lines of the plurality of metal lines and providing a uniform airgap with a space having a second dimension between metal lines of the plurality of metal lines. The first dimension is larger than the second dimension.

公开(公告)号：US20170133325A1

公开(公告)日：2017-05-11

申请号：US14933650

申请日：2015-11-05

Applicant: GLOBALFOUNDRIES INC.

Inventor： Moosung M. CHAE ,  Ki Young LEE ,  Songkram SRIVATHANAKUL

IPC: H01L23/532 ,  H01L23/522 ,  H01L23/528 ,  H01L21/768

CPC classification number: H01L21/76858 ,  H01L21/76867 ,  H01L21/76879 ,  H01L23/5226 ,  H01L23/53209

Abstract: A method of forming a self-forming barrier includes selectively removing a portion of a semiconductor dielectric layer to form a three-dimensional pattern within a remaining portion of the dielectric layer. A metal liner layer is disposed on a surface of the pattern to provide a metal lined pattern. A metal filling is disposed over the metal lined pattern, the metal filling being at least partially composed of a metal used in the metal liner layer. Diffusion ions are disposed in one of the metal filling and the metal liner layer. Heat is applied to the metal filling and metal liner layer to diffuse the diffusion ions from one of the metal filling and the metal liner layer into the dielectric layer to form a barrier layer between the metal liner layer and the dielectric layer.

公开(公告)号：US20140353835A1

公开(公告)日：2014-12-04

申请号：US13903283

申请日：2013-05-28

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Moosung M. CHAE ,  Errol Todd RYAN ,  Nicholas Vincent LICAUSI ,  Christian WITT ,  Ailian ZHAO ,  Ming HE ,  Sean X. LIN ,  Xunyuan ZHANG ,  Kunaljeet TANWAR

IPC: H01L21/768 ,  H01L23/48

CPC classification number: H01L21/76831 ,  H01L21/02203 ,  H01L21/3105 ,  H01L21/31695 ,  H01L21/7682 ,  H01L21/76843 ,  H01L2221/1047

Abstract: A process is provided for methods of reducing contamination of the self-forming barrier of an ultra-low k layer during semiconductor fabrication. In one aspect, a method includes: providing a cured ultra-low k film which contains at least one trench, and the pores of the film are filled with a pore-stuffing material; removing exposed pore-stuffing material at the surface of the trench to form exposed pores; and forming a self-forming barrier layer on the surface of the trench.

Abstract translation: 提供了一种用于在半导体制造期间减少超低k层的自形成势垒的污染的方法的方法。 一方面，一种方法包括：提供包含至少一个沟槽的固化的超低k膜，并且用孔填充材料填充膜的孔; 在沟槽的表面去除暴露的孔隙填充材料以形成暴露的孔; 并在沟槽的表面上形成自形成阻挡层。