公开(公告)号：US20160064354A1

公开(公告)日：2016-03-03

申请号：US14471620

申请日：2014-08-28

Applicant: GLOBALFOUNDRIES INC.

Inventor： Saket CHADDA ,  Ramakanth ALAPATI ,  Adam BEECE

IPC: H01L25/065 ,  H01L25/00

CPC classification number: H05K1/18 ,  H01L23/14 ,  H01L23/142 ,  H01L23/147 ,  H01L23/49822 ,  H01L23/49827 ,  H01L24/81 ,  H01L25/0652 ,  H01L25/16 ,  H01L25/50 ,  H01L27/016 ,  H01L2224/131 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2225/06548 ,  H01L2225/06589 ,  H05K1/032 ,  H05K1/053 ,  H05K1/115 ,  H05K1/16 ,  H05K1/181 ,  H05K3/4053 ,  H05K3/445 ,  H05K3/4644 ,  H05K2201/032 ,  H01L2924/014

Abstract: A methodology for a thin, flexible substrate having integrated passive circuit elements, and the resulting device are disclosed. Embodiments may include integrating one or more passive circuit components on a first or second surface of a substrate, and interconnecting one or more integrated circuit (IC) dies on a second surface of the interposer to the one or more passive circuit components with one or more metal-filled vias between the first and second surfaces, the first and second surfaces being opposite surfaces of the substrate.

Abstract translation: 公开了一种用于具有集成无源电路元件的薄柔性基板的方法，以及所得到的器件。 实施例可以包括在衬底的第一或第二表面上集成一个或多个无源电路部件，以及将一个或多个无源电路部件与一个或多个内插器的第二表面上的一个或多个集成电路（IC）管芯互连 在第一和第二表面之间的金属填充的通孔，第一和第二表面是基板的相对表面。

公开(公告)号：US20170062399A1

公开(公告)日：2017-03-02

申请号：US14833209

申请日：2015-08-24

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Luke ENGLAND ,  Ramakanth ALAPATI

IPC: H01L25/00 ,  H01L23/00 ,  H01L21/3105 ,  H01L23/48 ,  H01L21/311 ,  H01L21/268 ,  H01L25/065 ,  H01L21/82 ,  H01L21/768

CPC classification number: H01L25/50 ,  H01L21/268 ,  H01L21/78 ,  H01L24/11 ,  H01L24/17 ,  H01L24/83 ,  H01L24/94 ,  H01L25/0657 ,  H01L2224/13025 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/83896 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/16251

Abstract: Methods for removing low-k dielectric material from dicing lanes in a bonded pair of IC wafers and the resulting device are disclosed. Embodiments include providing low-k dielectric and standard dielectric layers on upper surfaces of top and bottom IC substrates, each including an array of adjacent IC die areas separated by dicing lanes; removing from the dicing lanes the standard and low-k dielectric layers to form cavities exposing sections of the upper surfaces of IC substrates; depositing a standard dielectric material in the cavities and on upper surfaces of the standard dielectric layer of the top and bottom IC substrates; planarizing upper surfaces of the standard dielectric material of the IC substrates; forming a face-to-face bonding of the IC substrates, wherein the dicing lanes in the IC substrates are vertically aligned; and dicing adjacent bonded IC die areas through vertically aligned dicing lanes in the IC substrates.

Abstract translation: 公开了一种用于从结合的IC晶片对中的切割通道中除去低k介电材料的方法以及所得到的器件。 实施例包括在顶部和底部IC基板的上表面上提供低k电介质和标准电介质层，每个包括由切割通道分隔开的相邻IC管芯区域的阵列; 从切割线移除标准和低k电介质层以形成暴露IC基板的上表面的部分的空腔; 在空腔中和顶部和底部IC基板的标准电介质层的上表面上沉积标准电介质材料; 平面化IC基板的标准介电材料的上表面; 形成IC基板的面对面接合，其中IC基板中的切割通道垂直对齐; 并通过IC基板中的垂直排列的切割通道切割相邻的接合IC芯片区域。

公开(公告)号：US20160165729A1

公开(公告)日：2016-06-09

申请号：US15046594

申请日：2016-02-18

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Saket CHADDA ,  Ramakanth ALAPATI ,  Adam BEECE

IPC: H05K1/18 ,  H05K1/03 ,  H05K1/11

CPC classification number: H01L25/0652 ,  H01L23/14 ,  H01L23/142 ,  H01L23/147 ,  H01L23/49822 ,  H01L23/49827 ,  H01L24/81 ,  H01L25/16 ,  H01L25/50 ,  H01L27/016 ,  H01L2224/131 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2225/06548 ,  H01L2225/06589 ,  H05K1/032 ,  H05K1/053 ,  H05K1/115 ,  H05K1/16 ,  H05K1/18 ,  H05K1/181 ,  H05K3/4053 ,  H05K3/445 ,  H05K3/4644 ,  H05K2201/032 ,  H01L2924/014

Abstract: A methodology for a thin, flexible substrate having integrated passive circuit elements, and the resulting device are disclosed. Embodiments may include integrating one or more passive circuit components on a first or second surface of a substrate, and interconnecting one or more integrated circuit (IC) dies on a second surface of the interposer to the one or more passive circuit components with one or more metal-filled vias between the first and second surfaces, the first and second surfaces being opposite surfaces of the substrate.

Abstract translation: 公开了一种用于具有集成无源电路元件的薄柔性基板的方法，以及所得到的器件。 实施例可以包括在衬底的第一或第二表面上集成一个或多个无源电路部件，以及将一个或多个无源电路部件与一个或多个内插器的第二表面上的一个或多个集成电路（IC）管芯互连 在第一和第二表面之间的金属填充的通孔，第一和第二表面是基板的相对表面。