Integrated circuit arrangement comprising a pin diode, and production method
    3.
    发明申请
    Integrated circuit arrangement comprising a pin diode, and production method 有权
    集成电路装置,包括pin二极管和制造方法

    公开(公告)号:US20070187795A1

    公开(公告)日:2007-08-16

    申请号:US11647550

    申请日:2006-12-28

    IPC分类号: H01L31/00

    CPC分类号: H01L27/0664 H01L27/14681

    摘要: An integrated circuit arrangement (10) containing a pin photodiode (14) and a highly doped connection region (62) of a bipolar transistor (58) is explained, inter alia. Skillful control of the method produces an intermediate region (30) of the pin diode (14) with a large depth and without autodoping in a central region.

    摘要翻译: 具体地说,包含双极晶体管(58)的引脚光电二极管(14)和高掺杂连接区域(62)的集成电路装置(10)。 该方法的精细控制产生了具有较大深度并且在中心区域没有自动掺杂的pin二极管(14)的中间区域(30)。

    ESD protection structures for semiconductor components
    5.
    发明授权
    ESD protection structures for semiconductor components 有权
    半导体元件的ESD保护结构

    公开(公告)号:US07943928B2

    公开(公告)日:2011-05-17

    申请号:US11603340

    申请日:2006-11-21

    IPC分类号: H01L29/04

    CPC分类号: H01L27/0255 H01L29/861

    摘要: An ESD protection structure includes a structure to be protected disposed in a semiconductor body. A region of a first conductivity type is disposed within the semiconductor body and a channel is disposed in the semiconductor body and extends through the region of the first conductivity type. A semiconductor of a second conductivity type is disposed within the channel adjacent the region of the first conductivity type such that the region of the first conductivity type and the semiconductor of the second conductivity type form a diode. At least one of the region of the first conductivity type and the semiconductor of the second conductivity type is electrically coupled to the structure to be protected.

    摘要翻译: ESD保护结构包括被配置在半导体本体中的要被保护的结构。 第一导电类型的区域设置在半导体本体内,并且沟道设置在半导体本体中并且延伸穿过第一导电类型的区域。 第二导电类型的半导体设置在与第一导电类型的区域相邻的沟道内,使得第一导电类型的区域和第二导电类型的半导体形成二极管。 第一导电类型的区域和第二导电类型的半导体中的至少一个电耦合到待保护的结构。

    ESD protection structures for semiconductor components
    6.
    发明申请
    ESD protection structures for semiconductor components 有权
    半导体元件的ESD保护结构

    公开(公告)号:US20080035924A1

    公开(公告)日:2008-02-14

    申请号:US11603340

    申请日:2006-11-21

    IPC分类号: H01L29/04

    CPC分类号: H01L27/0255 H01L29/861

    摘要: An ESD protection structure includes a structure to be protected disposed in a semiconductor body. A region of a first conductivity type is disposed within the semiconductor body and a channel is disposed in the semiconductor body and extends through the region of the first conductivity type. A semiconductor of a second conductivity type is disposed within the channel adjacent the region of the first conductivity type such that the region of the first conductivity type and the semiconductor of the second conductivity type form a diode. At least one of the region of the first conductivity type and the semiconductor of the second conductivity type is electrically coupled to the structure to be protected.

    摘要翻译: ESD保护结构包括被配置在半导体本体中的要被保护的结构。 第一导电类型的区域设置在半导体本体内,并且沟道设置在半导体本体中并且延伸穿过第一导电类型的区域。 第二导电类型的半导体设置在与第一导电类型的区域相邻的沟道内,使得第一导电类型的区域和第二导电类型的半导体形成二极管。 第一导电类型的区域和第二导电类型的半导体中的至少一个电耦合到待保护的结构。

    Micromechanical device and method for manufacturing a micromechanical device
    9.
    发明授权
    Micromechanical device and method for manufacturing a micromechanical device 失效
    微机械装置及其制造方法

    公开(公告)号:US07679151B2

    公开(公告)日:2010-03-16

    申请号:US11668743

    申请日:2007-01-30

    IPC分类号: H01L29/06

    摘要: In a method for manufacturing a micromechanical device having a region for forming an integrated circuit, at first a first layer is produced on a deeper-lying part in the substrate. Subsequently, a membrane layer is produced on the first layer and at least one channel completely penetrating the membrane layer is introduced in the membrane layer. After that, a region of the first layer below the membrane layer is removed to form a cavity. Finally, the channel is sealed and a planar surface is formed.

    摘要翻译: 在具有用于形成集成电路的区域的微机械器件的制造方法中,首先在衬底的较深的部分产生第一层。 随后,在第一层上产生膜层,并且将完全穿透膜层的至少一个通道引入膜层。 之后,去除膜层下面的第一层的区域以形成空腔。 最后,通道密封并形成平面。

    Integrated transistor, particularly for voltages and method for the production thereof
    10.
    发明授权
    Integrated transistor, particularly for voltages and method for the production thereof 有权
    集成晶体管,特别用于电压及其制造方法

    公开(公告)号:US08021952B2

    公开(公告)日:2011-09-20

    申请号:US12503505

    申请日:2009-07-15

    IPC分类号: H01L21/331

    摘要: Integrated transistor and method for the production is disclosed. An explanation is given of, inter alia, a transistor having an electrically insulating isolating trench extending from a main area in the direction of a connection region remote from the main area. Moreover, the transistor contains an auxiliary trench extending from the main area as far as the connection region remote from the main area. The transistor requires a small chip area and has outstanding electrical properties.

    摘要翻译: 公开了用于生产的集成晶体管和方法。 具体来说,说明了具有从远离主区域的连接区域的方向从主区域延伸的电绝缘隔离沟道的晶体管。 此外,晶体管包括从主区域延伸到远离主区域的连接区域的辅助沟槽。 晶体管需要小的芯片面积并具有出色的电气特性。