Field effect transistor having an asymmetrically stressed channel region
    8.
    发明授权
    Field effect transistor having an asymmetrically stressed channel region 有权
    具有不对称应力通道区域的场效应晶体管

    公开(公告)号:US07355221B2

    公开(公告)日:2008-04-08

    申请号:US10908448

    申请日:2005-05-12

    IPC分类号: H01L29/76

    摘要: A field effect transistor is provided which includes a contiguous single-crystal semiconductor region in which a source region, a channel region and a drain region are disposed. The channel region has an edge in common with the source region as a source edge, and the channel region further has an edge in common with the drain region as a drain edge. A gate conductor overlies the channel region. The field effect transistor further includes a structure which applies a stress at a first magnitude to only one of the source edge and the drain edge while applying the stress at no greater than a second magnitude to another one of the source edge and the drain edge, wherein the second magnitude has a value ranging from zero to about half the first magnitude. In a particular embodiment, the stress is applied at the first magnitude to the source edge while the zero or lower magnitude stress is applied to the drain edge. In another embodiment, the stress is applied at the first magnitude to the drain edge while the zero or lower magnitude stress is applied to the drain edge.

    摘要翻译: 提供一种场效应晶体管,其包括其中设置有源极区,沟道区和漏极区的邻接单晶半导体区。 沟道区域具有与源极区域共同的边缘作为源极边缘,并且沟道区域还具有与作为漏极边缘的漏极区域共同的边缘。 栅极导体覆盖沟道区域。 场效应晶体管还包括将源极边缘和漏极边缘的另一个施加不大于第二幅度的应力的第一幅度的应力仅施加到源极边缘和漏极边缘中的一个的结构, 其中所述第二幅度具有从零到所述第一幅度的大约一半的值。 在特定实施例中,将应力以第一幅度施加到源极边缘,同时零或较小幅度应力施加到漏极边缘。 在另一个实施例中,将应力以第一幅度施加到漏极边缘,同时将零或较小的幅度应力施加到漏极边缘。