公开(公告)号：US20080124881A1

公开(公告)日：2008-05-29

申请号：US11562735

申请日：2006-11-22

申请人： Jack Ooh Chu ,  Douglas Duane Coolbaugh ,  James Stuart Dunn ,  David R. Greenberg ,  David L. Harame ,  Basanth Jagannathan ,  Robb Allen Johnson ,  Louis D. Lanzerotti ,  Kathryn Turner Schonenberg ,  Ryan Wayne Wuthrich

发明人： Jack Ooh Chu ,  Douglas Duane Coolbaugh ,  James Stuart Dunn ,  David R. Greenberg ,  David L. Harame ,  Basanth Jagannathan ,  Robb Allen Johnson ,  Louis D. Lanzerotti ,  Kathryn Turner Schonenberg ,  Ryan Wayne Wuthrich

IPC分类号： H01L21/331

CPC分类号： H01L29/66242 ,  H01L21/02381 ,  H01L21/02447 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/02579 ,  H01L21/0262 ,  H01L29/1004 ,  H01L29/161 ,  H01L29/7378

摘要： A SiGe bipolar transistor containing substantially no dislocation defects present between the emitter and collector region and a method of forming the same are provided. The SiGe bipolar transistor includes a collector region of a first conductivity type; a SiGe base region formed on a portion of said collector region; and an emitter region of said first conductivity type formed over a portion of said base region, wherein said collector region and said base region include carbon continuously therein. The SiGe base region is further doped with boron.

摘要翻译： 提供了在发射极和集电极区域之间基本上不存在位错缺陷的SiGe双极晶体管及其形成方法。 SiGe双极晶体管包括第一导电类型的集电极区域; 形成在所述集电区域的一部分上的SiGe基区; 以及形成在所述基极区域的一部分上的所述第一导电类型的发射极区域，其中所述集电极区域和所述基极区域在其中连续地包括碳。 SiGe基区进一步掺硼。

公开(公告)号：US07173274B2

公开(公告)日：2007-02-06

申请号：US10953378

申请日：2004-09-29

申请人： Jack Oon Chu ,  Douglas Duane Coolbaugh ,  James Stuart Dunn ,  David R. Greenberg ,  David L. Harame ,  Basanth Jagannathan ,  Robb Allen Johnson ,  Louis D. Lanzerotti ,  Kathryn Turner Schonenberg ,  Ryan Wayne Wuthrich

发明人： Jack Oon Chu ,  Douglas Duane Coolbaugh ,  James Stuart Dunn ,  David R. Greenberg ,  David L. Harame ,  Basanth Jagannathan ,  Robb Allen Johnson ,  Louis D. Lanzerotti ,  Kathryn Turner Schonenberg ,  Ryan Wayne Wuthrich

IPC分类号： H01L29/06 ,  H01L31/072 ,  H01L31/109 ,  H01L31/0328 ,  H01L31/0339

CPC分类号： H01L29/66242 ,  H01L21/02381 ,  H01L21/02447 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/02579 ,  H01L21/0262 ,  H01L29/1004 ,  H01L29/161 ,  H01L29/7378

摘要： A SiGe bipolar transistor containing substantially no dislocation defects present between the emitter and collector region and a method of forming the same are provided. The SiGe bipolar transistor includes a collector region of a first conductivity type; a SiGe base region formed on a portion of said collector region; and an emitter region of said first conductivity type formed over a portion of said base region, wherein said collector region and said base region include carbon continuously therein. The SiGe base region is further doped with boron.

摘要翻译： 提供了在发射极和集电极区域之间基本上不存在位错缺陷的SiGe双极晶体管及其形成方法。 SiGe双极晶体管包括第一导电类型的集电极区域; 形成在所述集电区域的一部分上的SiGe基区; 以及形成在所述基极区域的一部分上的所述第一导电类型的发射极区域，其中所述集电极区域和所述基极区域在其中连续地包括碳。 SiGe基区进一步掺硼。

公开(公告)号：US07713829B2

公开(公告)日：2010-05-11

申请号：US11562735

申请日：2006-11-22

申请人： Jack Oon Chu ,  Douglas Duane Coolbaugh ,  James Stuart Dunn ,  David R. Greenberg ,  David L. Harame ,  Basanth Jagannathan ,  Robb Allen Johnson ,  Louis D. Lanzerotti ,  Kathryn Turner Schonenberg ,  Ryan Wayne Wuthrich

发明人： Jack Oon Chu ,  Douglas Duane Coolbaugh ,  James Stuart Dunn ,  David R. Greenberg ,  David L. Harame ,  Basanth Jagannathan ,  Robb Allen Johnson ,  Louis D. Lanzerotti ,  Kathryn Turner Schonenberg ,  Ryan Wayne Wuthrich

IPC分类号： H01L21/8222 ,  H01L29/737

CPC分类号： H01L29/66242 ,  H01L21/02381 ,  H01L21/02447 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/02579 ,  H01L21/0262 ,  H01L29/1004 ,  H01L29/161 ,  H01L29/7378

摘要： A SiGe bipolar transistor containing substantially no dislocation defects present between the emitter and collector region and a method of forming the same are provided. The SiGe bipolar transistor includes a collector region of a first conductivity type; a SiGe base region formed on a portion of said collector region; and an emitter region of said first conductivity type formed over a portion of said base region, wherein said collector region and said base region include carbon continuously therein. The SiGe base region is further doped with boron.

摘要翻译： 提供了在发射极和集电极区域之间基本上不存在位错缺陷的SiGe双极晶体管及其形成方法。 SiGe双极晶体管包括第一导电类型的集电极区域; 形成在所述集电区域的一部分上的SiGe基区; 以及形成在所述基极区域的一部分上的所述第一导电类型的发射极区域，其中所述集电极区域和所述基极区域在其中连续地包括碳。 SiGe基区进一步掺硼。

公开(公告)号：US06426265B1

公开(公告)日：2002-07-30

申请号：US09774126

申请日：2001-01-30

申请人： Jack Oon Chu ,  Douglas Duane Coolbaugh ,  James Stuart Dunn ,  David R. Greenberg ,  David L. Harame ,  Basanth Jagannathan ,  Robb Allen Johnson ,  Louis D. Lanzerotti ,  Kathryn Turner Schonenberg ,  Ryan Wayne Wuthrich

发明人： Jack Oon Chu ,  Douglas Duane Coolbaugh ,  James Stuart Dunn ,  David R. Greenberg ,  David L. Harame ,  Basanth Jagannathan ,  Robb Allen Johnson ,  Louis D. Lanzerotti ,  Kathryn Turner Schonenberg ,  Ryan Wayne Wuthrich

IPC分类号： H01L21331

CPC分类号： H01L29/66242 ,  H01L21/02381 ,  H01L21/02447 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/02579 ,  H01L21/0262 ,  H01L29/1004 ,  H01L29/161 ,  H01L29/7378

摘要： A SiGe bipolar transistor containing substantially no dislocation defects present between the emitter and collector region and a method of forming the same are provided. The SiGe bipolar transistor includes a collector region of a first conductivity type; a SiGe base region formed on a portion of said collector region; and an emitter region of said first conductivity type formed over a portion of said base region, wherein said collector region and said base region include carbon continuously therein. The SiGe base region is further doped with boron.

公开(公告)号：US06420747B2

公开(公告)日：2002-07-16

申请号：US09247275

申请日：1999-02-10

申请人： Douglas Duane Coolbaugh ,  James Stuart Dunn ,  Peter John Geiss ,  Douglas Brian Hershberger ,  Stephen Arthur St. Onge

发明人： Douglas Duane Coolbaugh ,  James Stuart Dunn ,  Peter John Geiss ,  Douglas Brian Hershberger ,  Stephen Arthur St. Onge

IPC分类号： H01L27108

CPC分类号： H01L29/94 ,  H01L29/4238

摘要： Reliable metal oxide semiconductor (MOS) devices which exhibit little or no oxide breakdown at the Rx edge during device biasing are provided. The improved reliability is obtained by forming a contact to the polysilicon top conductor over a substantially thicker portion of the dielectric region. A method of fabricating the improved CMOS devices is also disclosed herein.

摘要翻译： 提供了在器件偏置期间在Rx边缘处表现出很少或没有氧化物击穿的可靠的金属氧化物半导体（MOS）器件。 通过在电介质区域的基本上较厚的部分上形成与多晶硅顶导体的接触来获得改进的可靠性。 本文还公开了制造改进的CMOS器件的方法。

公开(公告)号：US06440811B1

公开(公告)日：2002-08-27

申请号：US09745361

申请日：2000-12-21

申请人： Douglas Duane Coolbaugh ,  James Stuart Dunn ,  Stephen Arthur St. Onge

发明人： Douglas Duane Coolbaugh ,  James Stuart Dunn ,  Stephen Arthur St. Onge

IPC分类号： H01L218228

CPC分类号： H01L28/40 ,  H01L27/0635

摘要： A method for fabricating a poly-poly capacitor integrated with a BiCMOS process which includes forming a lower plate electrode of a poly-poly capacitor during deposition of a gate electrode of a CMOS transistor; and forming an upper SiGe plate electrode during growth of a SiGe base region of a heterojunction bipolar transistor.

摘要翻译： 一种用于制造与BiCMOS工艺集成的多晶硅电容器的方法，包括在沉积CMOS晶体管的栅电极期间形成多晶硅电容器的下板电极; 以及在异质结双极晶体管的SiGe基区的生长期间形成上SiGe板电极。

公开(公告)号：US08390038B2

公开(公告)日：2013-03-05

申请号：US12133425

申请日：2008-06-05

申请人： Douglas Duane Coolbaugh ,  Ebenezer E. Eshun ,  Zhong-Xiang He ,  Robert Mark Rassel

发明人： Douglas Duane Coolbaugh ,  Ebenezer E. Eshun ,  Zhong-Xiang He ,  Robert Mark Rassel

IPC分类号： H01L27/108 ,  H01L29/94

CPC分类号： H01L28/60

摘要： A MIM capacitor device and method of making the device. The device includes an upper plate comprising one or more electrically conductive layers, a dielectric block comprising one or more dielectric layers, a lower plate comprising one or more electrically conductive layer; and a spreader plate comprising one or more electrically conductive layers.

摘要翻译： 一种MIM电容器及其制造方法。 该装置包括一个包括一个或多个导电层的上板，一个包括一个或多个电介质层的介质块，包括一个或多个导电层的下板; 以及包括一个或多个导电层的扩展板。

公开(公告)号：US07732294B2

公开(公告)日：2010-06-08

申请号：US12170464

申请日：2008-07-10

申请人： Anil Kumar Chinthakindi ,  Douglas Duane Coolbaugh ,  John Edward Florkey ,  Jeffrey Peter Gambino ,  Zhong-Xiang He ,  Anthony Kendall Stamper ,  Kunal Vaed

发明人： Anil Kumar Chinthakindi ,  Douglas Duane Coolbaugh ,  John Edward Florkey ,  Jeffrey Peter Gambino ,  Zhong-Xiang He ,  Anthony Kendall Stamper ,  Kunal Vaed

IPC分类号： H01L21/20

CPC分类号： H01L21/76885 ,  H01L21/76804 ,  H01L21/76807 ,  H01L21/76808 ,  H01L21/76814 ,  H01L21/76834 ,  H01L21/76852 ,  H01L21/76865 ,  H01L21/76879 ,  H01L23/5227 ,  H01L23/53238 ,  H01L28/10 ,  H01L2221/1036 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of a semiconductor device. A substrate is provided. At least one metal wiring level is within the substrate. An insulative layer is deposited on a surface of the substrate. An inductor is formed within the insulative layer using a patterned plate process. A wire bond pad is formed within the insulative layer, wherein at least a portion of the wire bond pad is substantially co-planar with the inductor.

摘要翻译： 一种半导体器件的方法。 提供基板。 衬底内至少有一个金属布线层。 绝缘层沉积在衬底的表面上。 使用图案化板工艺在绝缘层内形成电感器。 在绝缘层内形成引线接合焊盘，其中引线接合焊盘的至少一部分与电感器基本上共面。

公开(公告)号：US07361950B2

公开(公告)日：2008-04-22

申请号：US11162471

申请日：2005-09-12

申请人： Anil Kumar Chinthakindi ,  Douglas Duane Coolbaugh ,  Keith Edward Downes ,  Ebenezer E. Eshun ,  Zhong-Xiang He ,  Robert Mark Rassel ,  Anthony Kendall Stamper ,  Kunal Vaed

发明人： Anil Kumar Chinthakindi ,  Douglas Duane Coolbaugh ,  Keith Edward Downes ,  Ebenezer E. Eshun ,  Zhong-Xiang He ,  Robert Mark Rassel ,  Anthony Kendall Stamper ,  Kunal Vaed

IPC分类号： H01L27/108 ,  H01L29/94

CPC分类号： H01L28/40

摘要： A MIM capacitor is formed on a semiconductor substrate having a top surface and including regions formed in the surface selected from a Shallow Trench Isolation (STI) region and a doped well having exterior surfaces coplanar with the semiconductor substrate. A capacitor lower plate is either a lower electrode formed on the STI region in the semiconductor substrate or a lower electrode formed by a doped well formed in the top surface of the semiconductor substrate that may have a silicide surface. A capacitor HiK dielectric layer is formed on or above the lower plate. A capacitor second plate is formed on the HiK dielectric layer above the capacitor lower plate. A dual capacitor structure with a top plate may be formed above the second plate with vias connected to the lower plate protected from the second plate by sidewall spacers.

摘要翻译： 在具有顶表面并且包括形成在从浅沟槽隔离（STI）区域中选择的表面中的区域和具有与半导体衬底共面的外表面的掺杂阱的半导体衬底上形成MIM电容器。 电容器底板是形成在半导体衬底中的STI区域上的下电极或由可能具有硅化物表面的在半导体衬底的顶表面中形成的掺杂阱形成的下电极。 电容器HiK电介质层形成在下板上或上。 在电容器下板上方的HiK电介质层上形成电容器第二板。 可以在第二板的上方形成具有顶板的双电容器结构，其中通过侧壁间隔件连接到被第二板保护的下板的通孔。

公开(公告)号：US06800921B1

公开(公告)日：2004-10-05

申请号：US09516615

申请日：2000-03-01

申请人： Douglas Duane Coolbaugh ,  Gregory Gower Freeman ,  Seshadri Subbanna

发明人： Douglas Duane Coolbaugh ,  Gregory Gower Freeman ,  Seshadri Subbanna

IPC分类号： H01L27108

CPC分类号： H01L28/40 ,  H01L21/8249 ,  H01L27/0635 ,  Y10S438/951

摘要： A method of forming a poly-poly capacitor, a MOS transistor, and a bipolar transistor simultaneously on a substrate comprising the steps of depositing and patterning a first layer of polysilicon on the substrate to form a first plate electrode of said capacitor and on an electrode of the MOS transistor, and depositing and patterning a second layer of polysilicon on the substrate to form a second plate electrode of said capacitor and an electrode of the bipolar transistor.

摘要翻译： 一种在衬底上同时形成多晶硅多晶硅电容器，MOS晶体管和双极晶体管的方法，包括以下步骤：在衬底上沉积和构图第一层多晶硅以形成所述电容器的第一平板电极和电极 并且在衬底上沉积和构图第二层多晶硅以形成所述电容器的第二平板电极和双极晶体管的电极。