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公开(公告)号：US20160313622A1
公开(公告)日：2016-10-27
申请号：US14381823
申请日：2013-12-19
发明人： Xianxue DUAN , Mingji BAI , Dezhi XU , Zhixiang ZOU
IPC分类号： G02F1/1362 , H01L29/786 , G02F1/1368 , H01L27/12 , G02F1/1343
摘要： The present invention relates to the field of display technology, and provides a display substrate, its manufacturing method, and a display device. The method comprises a step of forming a pattern of a barrier layer and a pattern of a first electrode. The step of forming the pattern of the barrier layer and the pattern of the first electrode comprises: forming a barrier layer film and a first electrode film sequentially; and forming the pattern of the barrier layer and the pattern of the first electrode by a single patterning process.
摘要翻译： 本发明涉及显示技术领域，并且提供一种显示基板，其制造方法和显示装置。 该方法包括形成阻挡层的图案和第一电极的图案的步骤。 形成阻挡层的图案和第一电极的图案的步骤包括：依次形成阻挡层膜和第一电极膜; 以及通过单个图案化工艺形成阻挡层的图案和第一电极的图案。
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公开(公告)号：US20170261820A1
公开(公告)日：2017-09-14
申请号：US15528963
申请日：2016-09-19
发明人： Liang LIN , Chengshao YANG , Tao JIANG , Zhixiang ZOU , Yinhu HUANG
IPC分类号： G02F1/1343 , G02F1/1362 , H01L27/12 , G02F1/1333
CPC分类号： G02F1/134309 , G02F1/133345 , G02F1/13439 , G02F1/1362 , G02F1/136227 , G02F1/1368 , G02F2001/134318 , G02F2001/136231 , G02F2001/136236 , G02F2201/121 , G02F2201/123 , G02F2202/10 , H01L27/1244 , H01L27/1288
摘要： The embodiments of the present invention provide an array substrate and a method for manufacturing the same. The method includes: forming an ITO film on a substrate; performing an annealing treatment on the substrate; forming a gate metal film on the ITO film; and processing the ITO film and the gate metal film to obtain a common electrode pattern and a gate pattern. In the embodiments of the present invention, after film formation of ITO, an annealing process is performed. Water vapor residue in the ITO film can thus be released, thereby avoiding bumps on the interface between the ITO and other layers, and improving the yield of ADS products.
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公开(公告)号：US20230134406A1
公开(公告)日：2023-05-04
申请号：US17913465
申请日：2021-08-11
发明人： Yunhai WAN , Zhixiang ZOU , Chuan CHEN , Xuehai GUI , Peihua SUN
IPC分类号： G02F1/1343 , G02F1/1362 , G02F1/1368 , H01L27/12
摘要： An array substrate includes sub-pixels arranged in an array, scan lines, and data lines on a base substrate, with any one of the sub-pixels including a pixel electrode and a switch transistor; wherein the pixel electrode is connected to a drain electrode of the switch transistor, a gate electrode of the switch transistor is connected to one of the scan lines, a source electrode of the switch transistor is connected to one of the data lines; and an active layer of the switch transistor of the sub-pixel is located between the pixel electrode of the sub-pixel and the data line connected to the sub-pixel.
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4.发明申请MANUFACTURING METHOD FOR ARRAY SUBSTRATE, ARRAY SUBSTRATE AND DISPLAY DEVICE 审中-公开阵列基板，阵列基板和显示装置的制造方法公开(公告)号：US20160240558A1
公开(公告)日：2016-08-18
申请号：US14906461
申请日：2015-08-18
发明人： Zhixiang ZOU , Chengshao YANG , Yinhu HUANG
IPC分类号： H01L27/12 , H01L21/027
摘要： A manufacturing method comprises steps of: forming a metal pattern having a thickness d on a substrate; forming an insulating film layer on the substrate on which the metal pattern is formed, so that the insulating film layer has an overlap region with the metal pattern, an absolute value of a height difference between the overlap region of the insulating film layer and other regions of the insulating film layer being less than the thickness d; and, forming a pattern of a semiconductor layer and a source/drain metal layer on the substrate on which the insulating film layer is formed.
摘要翻译： 一种制造方法包括以下步骤：在基板上形成厚度d的金属图案; 在其上形成有金属图案的基板上形成绝缘膜层，使得绝缘膜层与金属图案具有重叠区域，绝缘膜层的重叠区域与其它区域之间的高度差的绝对值 绝缘膜层的厚度小于厚度d; 并且在其上形成有绝缘膜层的基板上形成半导体层和源极/漏极金属层的图案。
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公开(公告)号：US20170192548A1
公开(公告)日：2017-07-06
申请号：US15222341
申请日：2016-07-28
发明人： Chengshao YANG , Binbin CAO , Yinhu HUANG , Zhixiang ZOU
IPC分类号： G06F3/041
CPC分类号： G06F3/041 , G06F3/044 , G06F2203/04103 , G06F2203/04111
摘要： This disclosure provides a transparent conductive thin film, a substrate, a touch screen and a manufacturing method thereof, and a display device. The transparent conductive thin film comprises a first metal oxide layer, a metal layer and a second metal oxide layer arranged in a stacking manner.
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公开(公告)号：US20200273888A1
公开(公告)日：2020-08-27
申请号：US16598675
申请日：2019-10-10
发明人： Liang LIN , Yunhai WAN , Zhixiang ZOU , Chuan CHEN , Wei HE
摘要： A display substrate, display panel, and method of fabricating the display substrate. The display substrate includes: a first thin film transistor on a substrate; a second thin film transistor on the substrate and on the same side of the substrate as first thin film transistor; a light blocking structure between the substrate and an active region of first thin film transistor. The light blocking structure is configured to block at least a portion of light incident on the active region of first thin film transistor, such that a ratio of area of an illuminated portion of the active region of first thin film transistor to an area of the active region of first thin film transistor is less than a ratio of area of an illuminated portion of an active region of second thin film transistor to an area of the active region of second thin film transistor.
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7.发明申请公开(公告)号：US20170148819A1
公开(公告)日：2017-05-25
申请号：US15114219
申请日：2016-01-21
发明人： Zhiyuan LIN , Yinhu HUANG , Zhixiang ZOU , Binbin CAO
IPC分类号： H01L27/12 , H01L21/768 , H01L29/49 , G02F1/1343 , G02F1/1333 , G02F1/1362 , G02F1/1368 , H01L21/308 , H01L29/45
CPC分类号： H01L27/124 , G02F1/133345 , G02F1/134309 , G02F1/13439 , G02F1/136227 , G02F1/136286 , G02F1/1368 , G02F2001/13606 , G02F2001/136222 , G02F2001/13629 , G02F2001/136295 , G02F2201/121 , G02F2201/123 , H01L21/3081 , H01L21/3086 , H01L21/76802 , H01L21/77 , H01L27/1259 , H01L27/1262 , H01L29/41733 , H01L29/45 , H01L29/4908
摘要： A preparation method of a conductive via hole structure, a preparation method of an array substrate and a preparation method of a display device, the preparation method of the array substrate includes: forming a first metal layer (01) including the first metal structure (01a), forming a non-metallic film including a first part corresponding to the first metal structure (01a) and an organic insulating film (40′) in sequence; patterning the organic insulating film (40′) to form a first organic insulating layer via hole (41) corresponding to the first part; then baking to form an organic insulating layer (40); and then, removing the first part of the non-metallic film to form a non-metallic layer and expose the part of the surface (011) of the first metal structure (01a). This method can avoid the metal structure from being seriously oxidized.
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8.发明申请Array Substrate and Manufacturing Method Thereof, Display Panel and Display Device 审中-公开阵列基板及其制造方法，显示面板和显示设备公开(公告)号：US20170062487A1
公开(公告)日：2017-03-02
申请号：US15022036
申请日：2015-08-20
发明人： Zhixiang ZOU , Yinhu HUANG , Chengshao YANG , Botao SONG
IPC分类号： H01L27/12 , H01L23/00 , H01L21/768
CPC分类号： H01L27/1248 , G02F1/133345 , G02F1/1345 , H01L21/76834 , H01L23/562 , H01L27/02 , H01L27/1244 , H01L27/1262
摘要： The invention relates to the field of display design, and discloses an array substrate, a manufacturing method thereof, a display panel and a display device. The array substrate comprises a base substrate, and a peripheral gate line, a gate insulation layer, a peripheral data line and a protection layer which are formed on the base substrate in turn, wherein surface height of the protection layer corresponding to position where the peripheral gate line is located is higher than that of the protection layer corresponding to position where the peripheral data line is located. As such, when in contact with a peripheral wiring area of the array substrate, a foreign material is first in contact with the protection layer corresponding to position where the peripheral gate line is located, thereby reducing probability of crushing or scratching the peripheral data line by the foreign material, improving the stability of product performance.
摘要翻译： 本发明涉及显示设计领域，公开了一种阵列基板及其制造方法，显示面板及显示装置。 阵列基板包括依次形成在基底基板上的基底基板，外围栅极线，栅极绝缘层，外围数据线和保护层，其中保护层的表面高度对应于外围 栅极线位于与外围数据线所在位置对应的保护层的位置上。 这样，当与阵列基板的外围配线区域接触时，异物首先与对应于外围栅极线所在位置的保护层接触，从而降低了破碎或刮擦外围数据线的可能性， 异物，提高产品性能的稳定性。
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9.发明申请THIN FILM TRANSISTOR AND METHOD FOR MANUFACTURING THE SAME, ARRAY SUBSTRATE AND DISPLAY DEVICE 审中-公开薄膜晶体管及其制造方法，阵列基板和显示器件公开(公告)号：US20160372581A1
公开(公告)日：2016-12-22
申请号：US14905086
申请日：2015-09-11
发明人： Botao SONG , Liang Lin , Zhixiang ZOU , Yinhu HUANG
IPC分类号： H01L29/66 , H01L21/383 , H01L29/786 , H01L21/02
CPC分类号： H01L29/66969 , H01L21/02565 , H01L21/02614 , H01L21/383 , H01L27/1288 , H01L29/41733 , H01L29/45 , H01L29/7869 , H01L29/78696
摘要： A thin film transistor and manufacturing method thereof, an array substrate and a display device are disclosed. The thin film transistor includes a source electrode, a drain electrode and an active layer; the source electrode, the drain electrode and the active layer are disposed in a same layer, the source electrode and the drain electrode are separately joined to the active layer through their respective side faces, a material of the source electrode and the drain electrode is metal, and a material of the active layer is a metal oxide semiconductor in correspondence with material of the source electrode and the drain electrode. With the thin film transistor, procedures can be decreased, thereby reducing costs.
摘要翻译： 公开了一种薄膜晶体管及其制造方法，阵列基板和显示装置。 薄膜晶体管包括源电极，漏电极和有源层; 源电极，漏电极和有源层设置在同一层中，源电极和漏电极通过其各自的侧面分别接合到有源层，源电极和漏电极的材料是金属 并且有源层的材料是与源电极和漏电极的材料相对应的金属氧化物半导体。 利用薄膜晶体管，可以降低程序，从而降低成本。
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10.发明申请THIN FILM TRANSISTOR AND FABRICATION METHOD THEREOF, ARRAY SUBSTRATE, AND DISPLAY DEVICE 审中-公开薄膜晶体管及其制造方法，阵列基板和显示装置公开(公告)号：US20160293636A1
公开(公告)日：2016-10-06
申请号：US15072940
申请日：2016-03-17
发明人： Zhixiang ZOU , Binbin CAO , Yinhu HUANG
IPC分类号： H01L27/12 , H01L29/49 , H01L21/3213 , H01L29/66
CPC分类号： H01L27/124 , H01L21/0217 , H01L21/02315 , H01L21/321 , H01L27/1222 , H01L27/1255 , H01L29/42384 , H01L29/4908 , H01L29/66742 , H01L29/66765
摘要： A thin film transistor and a fabrication method thereof, an array substrate, and a display device are provided. The fabrication method comprises: forming a gate line on a base substrate; performing a treatment for alleviating a bulge of the gate line on the base substrate with the gate line formed thereon, and forming a gate insulating layer on the base substrate after the treatment. Thereby, a problem of bulge of the gate line occurring in a fabrication process of the thin film transistor can be alleviated or even avoided, so that resistance of the gate line is uniform, which further renders uniform display of the display device, and improves display quality of the display device.
摘要翻译： 提供薄膜晶体管及其制造方法，阵列基板和显示装置。 制造方法包括：在基底基板上形成栅极线; 进行处理以减轻其上形成有栅极线的基底基板上的栅极线的凸起，以及在处理后在基底基板上形成栅极绝缘层。 由此，可以减轻或者避免在薄膜晶体管的制造工艺中产生的栅极线的凸起的问题，使得栅极线的电阻是均匀的，这进一步使得显示装置的显示均匀，并且改善显示 显示设备的质量。
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