公开(公告)号：US20050003308A1

公开(公告)日：2005-01-06

申请号：US10811509

申请日：2004-03-29

申请人： Hans-Georg Frohlich ,  Oliver Genz ,  Werner Graf ,  Stefan Gruss ,  Matthias Handke ,  Percy Heger ,  Lars Heineck ,  Antje Laessig ,  Alexander Reb ,  Kristin Schupke ,  Momtchil Stavrev ,  Mirko Vogt

发明人： Hans-Georg Frohlich ,  Oliver Genz ,  Werner Graf ,  Stefan Gruss ,  Matthias Handke ,  Percy Heger ,  Lars Heineck ,  Antje Laessig ,  Alexander Reb ,  Kristin Schupke ,  Momtchil Stavrev ,  Mirko Vogt

IPC分类号： H01L21/60 ,  H01L21/768 ,  H01L21/8242 ,  G03F7/00

CPC分类号： H01L27/10888 ,  H01L21/76828 ,  H01L21/76829 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76837 ,  H01L21/76897 ,  H01L27/10894

摘要： In order to fabricate a contact hole plane in a memory module with an arrangement of memory cells each having a selection transistor, on a semiconductor substrate with an arrangement of mutually adjacent gate electrode tracks on the semiconductor surface, an insulator layer is formed on the semiconductor surface and a sacrificial layer is subsequently formed on the insulator layer, then material plugs are produced on the sacrificial layer for the purpose of defining contact openings between the mutually adjacent gate electrode tracks, the sacrificial layer is etched to form material plugs with the underlying sacrificial layer blocks, after the production of the vitreous layer with uncovering of the sacrificial layer blocks above the contact openings between the mutually adjacent gate electrode tracks, an essentially planar surface being formed, then the sacrificial layer material is etched out from the vitreous layer and the uncovered insulator material is removed above the contact openings on the semiconductor surface and, finally, the contact opening regions are filled with a conductive material.

摘要翻译： 为了在具有选择晶体管的存储单元的布置的存储器模块中制造接触孔平面，在半导体衬底上具有半导体表面上相互邻近的栅极电极轨迹的布置，在半导体上形成绝缘体层 表面和牺牲层随后形成在绝缘体层上，然后在牺牲层上产生材料插塞以便限定相互相邻的栅极电极轨道之间的接触开口，牺牲层被蚀刻以形成具有下面牺牲的材料塞 在玻璃质层的生产之后，在相邻的栅电极轨道之间的接触开口上方露出牺牲层块，形成基本平坦的表面，然后从玻璃质层蚀刻牺牲层材料，并且 未覆盖的绝缘体材料在触点上方移除 并且最后，用导电材料填充接触开口区域。

公开(公告)号：US07018781B2

公开(公告)日：2006-03-28

申请号：US10811509

申请日：2004-03-29

申请人： Hans-Georg Fröhlich ,  Oliver Genz ,  Werner Graf ,  Stefan Gruss ,  Matthias Handke ,  Percy Heger ,  Lars Heineck ,  Antje Laessig ,  Alexander Reb ,  Kristin Schupke ,  Momtchil Stavrev ,  Mirko Vogt

发明人： Hans-Georg Fröhlich ,  Oliver Genz ,  Werner Graf ,  Stefan Gruss ,  Matthias Handke ,  Percy Heger ,  Lars Heineck ,  Antje Laessig ,  Alexander Reb ,  Kristin Schupke ,  Momtchil Stavrev ,  Mirko Vogt

IPC分类号： G03F7/00

CPC分类号： H01L27/10888 ,  H01L21/76828 ,  H01L21/76829 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76837 ,  H01L21/76897 ,  H01L27/10894

摘要： Disclosed is a method for fabricating a contract hole plane in a memory module with an arrangement of memory cells each having a selection transistor. The methods can be utilized during the production of dynamic random access memory (DRAM) modules.

摘要翻译： 公开了一种在具有选择晶体管的存储单元的布置的存储器模块中制造合同孔平面的方法。 可以在生产动态随机存取存储器（DRAM）模块期间利用这些方法。

公开(公告)号：US07141507B2

公开(公告)日：2006-11-28

申请号：US11065342

申请日：2005-02-25

申请人： Oliver Genz ,  Markus Kirchhoff ,  Stephan Machill ,  Alexander Reb ,  Barbara Schmidt ,  Momtchil Stavrev ,  Maik Stegemann ,  Stephan Wege

发明人： Oliver Genz ,  Markus Kirchhoff ,  Stephan Machill ,  Alexander Reb ,  Barbara Schmidt ,  Momtchil Stavrev ,  Maik Stegemann ,  Stephan Wege

IPC分类号： H01L21/302

CPC分类号： H01L21/76811 ,  H01L21/0276 ,  H01L21/0332 ,  H01L21/3081 ,  H01L21/31144

摘要： A method for producing a semiconductor structure including preparing a semiconductor substrate, and generating a lower first, a middle second and an upper third masking layer on a surface of the semiconductor substrate. The method further includes forming at least one first window in the upper third masking layer, structuring the middle second masking layer using the first window for transferring the first window, structuring the lower first masking layer using the first window for transferring the first window, and enlarging the first window to form a second window. The method for further includes restructuring the middle second masking layer using the second window for transferring the second window, structuring the semiconductor substrate, using the structured lower third masking layer, restructuring the lower first masking layer using the second window, and restructuring the semiconductor substrate using the restructured lower third masking layer.

摘要翻译： 一种制造半导体结构的方法，包括制备半导体衬底，并在所述半导体衬底的表面上产生下部第一，中间第二和上部第三掩模层。 该方法还包括在上部第三掩蔽层中形成至少一个第一窗口，使用用于传送第一窗口的第一窗口构造中间第二掩蔽层，使用用于传送第一窗口的第一窗口构造下部第一掩蔽层，以及 扩大第一个窗口形成第二个窗口。 该方法还包括：使用第二窗口重建中间第二掩蔽层，使用结构化的下部第三掩蔽层，使用第二窗口重构下部第一掩蔽层，并重构半导体衬底，构建半导体衬底; 使用重组的下三层掩蔽层。

公开(公告)号：US20050196952A1

公开(公告)日：2005-09-08

申请号：US11065342

申请日：2005-02-25

申请人： Oliver Genz ,  Markus Kirchhoff ,  Stefan Machill ,  Alexander Reb ,  Barbara Schmidt ,  Momtchil Stavrev ,  Maik Stegeman ,  Stephan Wege

发明人： Oliver Genz ,  Markus Kirchhoff ,  Stefan Machill ,  Alexander Reb ,  Barbara Schmidt ,  Momtchil Stavrev ,  Maik Stegeman ,  Stephan Wege

IPC分类号： H01L21/027 ,  H01L21/033 ,  H01L21/308 ,  H01L21/311 ,  H01L21/4763 ,  H01L21/768 ,  H01L21/8234 ,  H01L21/8244

CPC分类号： H01L21/76811 ,  H01L21/0276 ,  H01L21/0332 ,  H01L21/3081 ,  H01L21/31144

摘要： A method for producing a semiconductor structure including preparing a semiconductor substrate, and generating a lower first, a middle second and an upper third masking layer on a surface of the semiconductor substrate. The method further includes forming at least one first window in the upper third masking layer, structuring the middle second masking layer using the first window for transferring the first window, structuring the lower first masking layer using the first window for transferring the first window, and enlarging the first window to form a second window. The method for further includes restructuring the middle second masking layer using the second window for transferring the second window, structuring the semiconductor substrate, using the structured lower third masking layer, restructuring the lower first masking layer using the second window, and restructuring the semiconductor substrate using the restructured lower third masking layer.

摘要翻译： 一种制造半导体结构的方法，包括制备半导体衬底，并在所述半导体衬底的表面上产生下部第一，中间第二和上部第三掩模层。 该方法还包括在上部第三掩蔽层中形成至少一个第一窗口，使用用于传送第一窗口的第一窗口构造中间第二掩蔽层，使用用于传送第一窗口的第一窗口构造下部第一掩蔽层，以及 扩大第一个窗口形成第二个窗口。 该方法还包括：使用第二窗口重建中间第二掩蔽层，使用结构化的下部第三掩蔽层，使用第二窗口重构下部第一掩蔽层，并重构半导体衬底，构建半导体衬底; 使用重组的下三层掩蔽层。

公开(公告)号：US07049228B2

公开(公告)日：2006-05-23

申请号：US10756360

申请日：2004-01-14

申请人： Ulrich Baier ,  Oliver Genz

发明人： Ulrich Baier ,  Oliver Genz

IPC分类号： H01L21/44

CPC分类号： H01L21/76808 ,  H01L21/31144 ,  H01L21/76813

摘要： A process for introducing structures that have different dimensions, particularly with regard to depth, in which just one lithography level is required, is disclosed. This is achieved by use of a layer stack deposited on a substrate, where one layer in particular is used to store information related to the dimensioning of the different structures. The layer is partially opened up to expose the substrate at locations corresponding to where deep structures are to be formed. Deep structures are subsequently etched into the substrate, after which the layer is opened up at locations corresponding to where shallow structures are to be formed. The latter locations are subsequently etched to the desired depth of the shallower structures. The process can be used instead of conventional the dual damascene technology for the structuring of contact holes and interconnects.

摘要翻译： 公开了一种用于引入具有不同尺寸的结构的方法，特别是在深度方面，其中仅需要一个光刻度。 这通过使用沉积在衬底上的层堆栈来实现，其中一层特别地用于存储与不同结构的尺寸相关的信息。 该层被部分地打开以在对应于将要形成深层结构的位置处露出衬底。 深层结构随后被蚀刻到衬底中，然后在对应于要形成浅结构的位置处打开该层。 随后将后面的位置蚀刻到较浅结构的期望深度。 可以使用该过程代替传统的双镶嵌技术来构造接触孔和互连。

公开(公告)号：US06558883B2

公开(公告)日：2003-05-06

申请号：US09801413

申请日：2001-03-08

申请人： Oliver Genz ,  Jurgen Preuninger ,  Gerhard Kunkel

发明人： Oliver Genz ,  Jurgen Preuninger ,  Gerhard Kunkel

IPC分类号： G03F720

CPC分类号： G03F7/70358 ,  G03F7/70725

摘要： A method and apparatus (100) for patterning the surface of a semiconductor wafer (130). A stage (148) is coupled to a motor (150) that is adapted to move the stage (148) and a semiconductor wafer (130) in a horizontal direction at a first speed A. A mask (140) is disposed above the semiconductor wafer (130), the mask (140) being coupled to a motor (142) that is adapted to move the mask (140) in a horizontal direction at a second speed B. The ratio of the first and second speeds is different than the magnification factor, which may be other than 1:1 if a lens (120) is used. The mask (140) and the wafer (130) may be moved in the same horizontal direction simultaneously during the exposure process at different speeds B and A, respectively, to provide a magnification or demagnification of the mask (140) pattern onto the wafer (130) surface.

公开(公告)号：US6031614A

公开(公告)日：2000-02-29

申请号：US204402

申请日：1998-12-02

申请人： Alexander Michaelis ,  Oliver Genz ,  Ulrich Mantz

发明人： Alexander Michaelis ,  Oliver Genz ,  Ulrich Mantz

IPC分类号： G01B11/00 ,  G01B11/02 ,  G01J4/00 ,  H01L21/66

CPC分类号： G01J4/00 ,  G01B11/02

摘要： A system for measuring surface features having form birefringence in accordance with the present invention includes a radiation source for providing radiation incident on a surface having surface features. A radiation detecting device is provided for measuring characteristics of the incident radiation after being reflected from the surface features. A rotating stage rotates the surface such that incident light is directed at different angles due to the rotation of the rotating stage. A processor is included for processing the measured characteristics of the reflected light and correlating the characteristics to measure the surface features. A method for measuring feature sizes having form birefringence, in accordance with the present invention includes the steps of providing a surface having surface features thereon, radiating the surface features with light having a first polarization, measuring a reflected polarization of light reflected from the surface features, rotating the surface features by rotating the surface to measure the reflected polarization of the reflected light at least one new rotated position and correlating the reflected polarization to surface feature sizes.

摘要翻译： 根据本发明的用于测量具有双折射的表面特征的系统包括用于提供入射在具有表面特征的表面上的辐射的辐射源。 提供辐射检测装置，用于测量从表面特征反射后的入射辐射的特性。 旋转台旋转表面，使得入射光由于旋转台的旋转而以不同的角度被引导。 包括一个处理器来处理所测量的反射光的特性，并且将特征相关联以测量表面特征。 根据本发明的用于测量具有双折射的特征尺寸的方法包括以下步骤：在其上提供具有表面特征的表面，用具有第一偏振光的光辐射表面特征，测量从表面特征反射的光的反射偏振 通过旋转表面旋转表面特征以测量反射光的反射极化至少一个新的旋转位置，并将反射的偏振与表面特征尺寸相关联。

公开(公告)号：US06740594B2

公开(公告)日：2004-05-25

申请号：US09867518

申请日：2001-05-31

申请人： Zhijian Lu ,  Oliver Genz

发明人： Zhijian Lu ,  Oliver Genz

IPC分类号： H01L21311

CPC分类号： H01L21/31144 ,  H01L21/0337 ,  H01L21/3086

摘要： A method for removing a carbon-containing polysilane from a semiconductor substrate without stripping the polysilane during manufacture of a semiconductor device, the method entailing the steps in the following order of coating a carbon-containing polysilane on a semiconductor substrate and coating a resist on the polysilane; patterning the resist with exposure and development; transferring the pattern from the resist to the polysilane using an etch process selective to the resist; stripping the resist; transferring the pattern from the polysilane to a hardmask using an etch selective to the hardmask; subjecting the polysilane to thermal or plasma/thermal oxidation to convert the polysilane to silicon oxide; and etching the substrate and stripping off the hardmask.

摘要翻译： 在半导体器件的制造过程中从半导体衬底中除去含碳聚硅烷的方法而不剥离聚硅烷的方法，该方法包括以下步骤：在半导体衬底上涂覆含碳聚硅烷并在其上涂覆抗蚀剂 聚硅烷 通过曝光和显影来图案化抗蚀剂; 使用对抗蚀剂有选择性的蚀刻工艺将图案从抗蚀剂转移到聚硅烷; 剥离抗蚀剂; 使用对硬掩模的选择性蚀刻将图案从聚硅烷转移到硬掩模; 使聚硅烷进行热或等离子体/热氧化，以将聚硅烷转化为氧化硅; 并蚀刻基板并剥离硬掩模。

公开(公告)号：US07046363B2

公开(公告)日：2006-05-16

申请号：US10236448

申请日：2002-09-06

申请人： Alexander Michaelis ,  Oliver Genz ,  Ulrich Mantz

发明人： Alexander Michaelis ,  Oliver Genz ,  Ulrich Mantz

IPC分类号： G01N21/55

CPC分类号： G01B11/02

摘要： An apparatus and method for measuring feature sizes having form birefringence. The method includes providing a surface having surface features thereon; radiating the surface features with light having a first wavelength and a first polarization; measuring a reflected polarization of light having the first wavelength reflected from the surface features; rotating the surface features by rotating the surface to measure the reflected polarization of the reflected light having the first wavelength at least one new rotated position; radiating the surface features with light having a second wavelength and the first polarization; measuring a reflected polarization of light having the second wavelength reflected from the surface features; rotating the surface features by rotating the surface to measure the reflected polarization of the reflected light having the second wavelength at least one new rotated position; and correlating the reflected polarization from the light having the first and second polarizations to surface feature sizes.

摘要翻译： 一种用于测量具有双折射形状的特征尺寸的装置和方法。 该方法包括提供其上具有表面特征的表面; 用具有第一波长和第一极化的光辐射表面特征; 测量具有从表面特征反射的第一波长的光的反射偏振; 通过旋转表面来旋转表面特征以测量具有第一波长的反射光的反射偏振至少一个新的旋转位置; 用具有第二波长和第一极化的光辐射表面特征; 测量具有从表面特征反射的第二波长的光的反射偏振; 通过旋转表面来旋转表面特征以测量具有第二波长的反射光的反射偏振至少一个新的旋转位置; 并且将具有第一和第二偏振的光的反射偏振与表面特征尺寸相关联。

公开(公告)号：US06387771B1

公开(公告)日：2002-05-14

申请号：US09327711

申请日：1999-06-08

申请人： Oliver Genz ,  Alexander Michaelis

发明人： Oliver Genz ,  Alexander Michaelis

IPC分类号： H01L2120

CPC分类号： C25D11/02 ,  C25D11/022 ,  H01L21/0332 ,  H01L21/0337 ,  H01L21/31687

摘要： A method for forming a valve metal oxide for semiconductor fabrication in accordance with the present invention is disclosed and claimed. The method includes the steps of providing a semiconductor wafer, depositing a valve metal on the wafer, placing the wafer in an electrochemical cell such that a solution including electrolytes interacts with the valve metal to form a metal oxide when a potential difference is provided between the valve metal and the solution and processing the wafer using the metal oxide layer.

摘要翻译： 公开并要求保护根据本发明形成用于半导体制造的阀金属氧化物的方法。 该方法包括以下步骤：提供半导体晶片，在晶片上沉积阀金属，将晶片放置在电化学电池中，使得包含电解质的溶液与阀金属相互作用以形成金属氧化物，当在 阀金属和溶液，并使用金属氧化物层处理晶片。